Port Digital Signal Input Enable Control Register (Pxie) - STC micro STC8A8K64D4 Series Reference Manual

STC8A8K64D4 Series Manual
P5DR FE2DH
P6DR FE2EH
P7DR FE2FH
Drive capability control bit:
0: Enhanced drive ability
1: General drive ability

9.1.7 Port digital signal input enable control register (PxIE)

Symbol
Address
P0IE
FE30H
P1IE
FE31H
P2IE
FE32H
P3IE
FE33H
P4IE
FE34H
P5IE
FE35H
P6IE
FE36H
P7IE
FE37H
Digital signal input enable control:
0: Disable digital signal input.
key input port or external crystal oscillator input pin, it must be set to 0 before entering the clock stop mode, otherwise
there will be additional power consumption.
1: Enable digital signal
level of the external port.
- -
P67DR P66DR
P77DR P76DR
B7 B6
P07IE P06IE
P17IE P16IE
P27IE P26IE
P37IE P36IE
P47IE P46IE
- -
P67IE P66IE
P77IE P76IE
If the I/O is used as an analog port such as a comparator input port, ADC input port, touch
input. If the I/O is used as a digital port, it must be set to 1, otherwise the MCU cannot read the
P55DR P54DR P53DR
P65DR P64DR P63DR
P75DR P74DR P73DR
B5 B4 B3
P05IE P04IE P03IE
P15IE P14IE P13IE
P25IE P24IE P23IE
P35IE P34IE P33IE
P45IE P44IE P43IE
P55IE P54IE P53IE
P65IE P64IE P63IE
P75IE P74IE P73IE
-
P52DR P51DR P50DR
P62DR P61DR P60DR
P72DR P71DR P70DR
B2 B1 B0
P02IE P11IE P00IE
P12IE P11IE P10IE
P22IE P21IE P20IE
P32IE P31IE P30IE
P42IE P41IE P40IE
P52IE P41IE P50IE
P62IE P41IE P60IE
P72IE P41IE P70IE
- 167 -
xx11,1111
1111,1111
1111,1111