Main Clock Output Control Register (Mclkocr) - STC micro STC8A8K64D4 Series Reference Manual

STC8A8K64D4 Series Manual
of the oscillator to become stable. The clock controller will set the IRC32KST flag automatically after the internal
oscillator frequency stabilizes. When the user program needs to switch the clock to the internal 32KHz low speed IRC,
ENIRC32K must be set at first to enable the oscillator and then keep polling the oscillator stable flag IRC32KST until
the flag changes to 1.

6.1.6 Main clock output control register (MCLKOCR)

Symbol Address
MCLKOCR FE05H
MCLKODIV[6:0]: Main clock output division factor
(Note: The clock source of main clock output is system clock divided by
MCLKODIV[6:0] Divided system clock output frequency
0000000
0000001
0000010
0000011
...
1111110
1111111
MCLKO_S: Main clock output pin selection
0: Main clock output to P5.4
1: Main clock output to P1.6
B7 B6
MCLKO_S
No clock out
SYSClk/1
SYSClk /2
SYSClk /3
...
SYSClk /126
SYSClk /127
B5 B4
MCLKODIV[6:0]
CLKDIV)
-
B3 B2 B1 B0
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