STC micro STC8A8K64D4 Series Reference Manual page 71

STC8A8K64D4 Series Manual
CLKDIV: Frequency division factor of the main clock. The system clock SYSCLK is a clock signal obtained by dividing the
main clock MCLK.
CLKDIV System clock frequency
0 MCLK/1
1 MCLK/1
2 MCLK/2
3 MCLK/3
...
x MCLK/x
...
255 MCLK/255
...
...
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