System Communications Module
The ports are set up for asynchronous serial data transmission. The byte structure is as
follows: one start bit, eight data bits and one stop bit. More stop bits are ignored when
received. The eighth data bit, or parity bit, is not used.
The jacks for the three 1/0 ports are located on the rear panel of the main chassis as shown
in Fig. 7-2.
1/0 Port Interfacing
Each 1/0 port is interfaced with a Motorola
6850
ACIA. These ports are configured to be
RS-232-C interface type D with Data Terminal Ready (DTR) sensed. See Table 7-2.
All of the referenced RS-232-C control signals are used in the µProcessor Lab, and any
equipment interfaced to the lab must be properly configured.
When iarge blocks of data are transferred to a device with limited buffer space, the
RS-232-C control signals must be used to cause a data transmission delay. The delay allows
the buffer to be emptied. These RS-232-C control signals have to be used and sensed in
both hardware and software.
8001/8002 Installation Guide
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7-5
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