NEC mPD784225 Series User Manual page 507

Analog delay
RESET input
Internal reset signal
Internal clock
Hardware
Main system clock oscillator
Subsystem clock oscillator
Program counter (PC)
Stack pointer (SP)
Program status word (PSW)
Internal RAM
I/O lines
Other hardware
Note See Table 3-6 Special Function Register (SFR) List when resetting.
CHAPTER 25 RESET FUNCTION
Figure 25-2. Receiving Reset Signal
Analog delay
Table 25-1. State After Reset for All Hardware Resets
State During Reset (RESET = L)
Oscillation stops
Not affected by the reset
Undefined
Undefined
Initialize to 0000H.
This is undefined. However, when the standby state is released by a reset, the
value is saved before setting standby.
The input and output buffers turn off.
Initialize to the fixed state
User's Manual U12697EJ3V0UM
Analog Oscillation
delay stabilization time
State After Reset (RESET = H)
Oscillation starts
Set a value in the reset vectored table.
High impedance
Note
.
Time until clock
starts oscillating
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