Table of Contents
Advertisement
(4) Oscillation stabilization time specification register (OSTS)
This register specifies the operation of the oscillator. Either a crystal/ceramic resonator or external clock is set
to the EXTC bit in OSTS as the clock used. The STOP mode can be set even during external clock input only
when the EXTC bit is set 1.
OSTS is set by a 1-bit or 8-bit transfer instruction.
RESET input sets OSTS to 00H.
Figure 4-5. Format of Oscillation Stabilization Time Specification Register (OSTS)
Address: 0FFCFH After reset: 00H
Symbol
7
OSTS
EXTC
Cautions 1. When a crystal/ceramic resonator is used, make sure to clear the EXTC bit to 0. If the
EXTC bit is set to 1, oscillation stops.
2. When using the STOP mode during external clock input, make sure to set the EXTC bit
to 1 before setting the STOP mode. If the STOP mode is used during external clock input
when the EXTC bit of OSTS has been cleared, the µ PD784225 may be damaged or its
reliability may be impaired.
3. If the EXTC bit is set to 1 during external clock input, the opposite phase of the clock
input to the X1 pin must be input to the X2 pin. If the EXTC bit is set to 1, the µ PD784225
operates only with the clock input to the X2 pin.
Remark
1. Figures in parentheses apply to operation at f
2. ×: don't care
CHAPTER 4 CLOCK GENERATOR
R/W
6
5
4
0
0
0
EXTC
0
Crystal/ceramic resonator is used
1
External clock is used
EXTC
OSTS2
OSTS1
0
0
0
0
0
0
0
0
1
0
0
1
0
1
0
0
1
0
0
1
1
0
1
1
×
×
1
User's Manual U12697EJ3V0UM
3
2
0
OSTS2
OSTS1
External clock selection
OSTS0
Oscillation stabilization time
19
0
2
/f
(41.9 ms)
XX
18
1
2
/f
(21.0 ms)
XX
17
0
2
/f
(10.5 ms)
XX
16
1
2
/f
(5.2 ms)
XX
15
0
2
/f
(2.6 ms)
XX
14
1
2
/f
(1.3 ms)
XX
(655 µ s)
13
0
2
/f
XX
(328 µ s)
12
1
2
/f
XX
×
(41.0 µ s)
512/f
XX
= 12.5 MHz.
XX
1
0
OSTS0
99
Advertisement
Table of Contents
