COM-HPC-ALT User's Guide
GP_SPI_ALERT#
B100
4.3.10 Power & System Management
VIN_PWR_OK indicates that all the power to the Module is stable within the specified range and can be used to enable Module internal power supplies.
Name
Pin #
PWRBTN#
B02
RSTBTN#
C02
PLTRST#
A12
VIN_PWR_OK
C06
SUS_S3#
B08
Page 24
Alert (interrupt) from a Carrier GP_SPI device to the
Module
Description
A falling edge creates a power button event. Power button events
can be used to bring a system out of S5 soft off and other suspend
states, as well as powering the system down.
Reset button input. Active low request for Module to reset and
reboot. May be falling edge sensitive. For situations when RSTBTN#
is not able to reestablish control of the system, VIN_PWR_OK or a
power cycle may be used.
Platform Reset: output from Module to Carrier Board. Active low.
Issued by Module chipset and may result from a low RSTBTN# input,
a low VIN_PWR_OK input, a VCC power input that falls below the
minimum specification, a watchdog timeout, or may be initiated by
the Module software..
Power OK from main power supply. A high value indicates that the
power is good. This signal can be used to hold off Module startup to
allow Carrier based FPGAs or other configurable devices time to be
programmed.
Indicates system is in Suspend to RAM state. Active low output. An
inverted copy of SUS_S3# on the Carrier Board should be used to
enable the non-standby power on a typical ATX supply.
Even in single input supply system implementations (AT mode, no
standby input), the SUS_S3# Module output should be used disable
any Carrier voltage regulators when SUS_S3# is low, to prevent bleed
leakage from Carrier circuits into the Module.
Copyright © 2023 ADLINK Technology, Inc.
I 3.3V
PU 10K
I/O
PU / PD
I 3.3VSB
PU 10K
I 3.3VSB
PU 90K
O 3.3VSB
I 3.3V
PU 10K
O 3.3VSB
PICMG COM-HPC R1.0
Comment
Need help?
Do you have a question about the arm AMPERE COM-HPC-ALT and is the answer not in the manual?