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COM-HPC-ALT User's Guide
ETH0-3_PHY_INT#
G98
ETH0-3_PHY_RST#
F97
ETH0-3_I2C_DAT
G97
ETH0-3_I2C_CLK
G96
ETH0_SDP
F98
ETH1_SDP
F99
ETH2_SDP
F1
ETH3_SDP
F2
ETH0-3_PRSNT#
H96
Note: The Ethernet KR support is 10GBASE-KR
4.3.2 NBASE-T Ethernet
The port may operate in 10Gbps, 5Gbps, 2.5Gbps, 1Gbps, 100Mbps, or 10Mbps modes. Magnetics are to be on the Carrier board. The COM-HPC
module shall be capable of 1000BASE-T mode.
Name
Pin #
NBASET0_MDI0-
D85
Ethernet Controller 1: Media Dependent Interface Differential Pairs
D86
0,1,2,3. The MDI can operate in 10Gbps, 1Gbps, 100Mbps and 10
Page 9
Active low PHY interrupt signal from ETH ports 0 to 3
Active low output PHY reset signal for ETH ports 0 to
3.
I2C data signal of the 2-wire management interface
used by the Ethernet KR controller to access the
management registers of an external SFP Module or
to configure the Carrier PHY for ETHx ports 0 to 3 and
for serialized status information (e.g. LED states)..
The I2C clock signals associated with ETH0-3 I2C data
lines in the row above.
Software-Definable Pins. Can also be used for
IEEE1588 support such as a PPS signal.
Carrier pulls this line to GND if there is Carrier
hardware present to support Ethernet KR signaling on
ETH0 through ETH3. If the entire KR quad is not
supported it should fill from ETH0 on up.
Description
Copyright © 2023 ADLINK Technology, Inc.
I
PU 2K2
3.3VSB
O
3.3VSB
I/O OD
PU 2K2
3.3VSB
I/O OD
PU 2K2
3.3VSB
I/O
3.3VSB
I
PU
3.3VSB
I/O
PU / PD
I/O Analog
PICMG COM-HPC R1.0
Comment
Twisted pair signals for external transformer.
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