Alinx AC7010C User Manual page 38

Zynq7000 fpga core board
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interfaces for users. Currently, the J12 interface can be directly connected to
the module provided by ALINX, include: ADDA module, LCD module, Gigabit
Ethernet module, audio input/output module, matrix keyboard module, 500W
binocular vision camera module, etc.
The expansion port has 40 signals, of which 1-channel 5V power supply,
2-channel 3.3 V power supply, 3-channle ground and 34 IOs. 34 IO ports are
connected to BANK34 and BANK35 of ZYNQ PL. The PCB design is
differentially connected. The default level is 3.3V. The user can change the
level of IO by replacing the power chip (SPX3819M5-3-3) of VCCIO34 and
VCCIO35 on the core board.
Do not directly connect the IO directly to the 5V device to avoid
burning the FPGA. If you want to connect 5V equipment, you need to
connect level conversion chip.
The circuit of the expansion port (J12) is shown in Figure 7-7:
Figure 7-8: Expansion header J12 on the FPGA Board
www.alinx.com
Figure 7-7: Expansion Port J12 schematic
AC7010C / AC7020C User Manual
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