Part 6.4: Usb2.0 Interface - Alinx AC7010C User Manual

Zynq7000 fpga core board
Table of Contents

Advertisement

Part 6.4: USB2.0 Interface

The USB2.0 transceiver used in the AC7010C/AC7020C is a 1.8V,
high-speed USB3320C-EZK that supports the ULPI standard interface.
ZYNQ's USB bus interface is connected to the USB3320C-EZK transceiver for
high-speed USB2.0 Host mode and Slave mode data communication. The
USB3320C's USB data and control signals are connected to the IO port of the
BANK501 on the PS side of the ZYNQ chip. A 24MHz crystal provides the
system clock for the USB3320C.
The core board provides users with two USB ports, one is the Host USB
port and the other is the OTG USB port. They are a flat USB interface (USB
Type A) and a micro USB interface (Micro USB), which are convenient for
users to connect different USB peripherals. Users can switch between Host
and OTG through J5 and J6 jumpers on the core board. Table 6-3 shows the
mode switching instructions:
J5,J6 Status
J5 and J6 installation
jumper caps
J5 and J6 not
installation jumper
caps
www.alinx.com
USB Mode
HOST Mode
OTG Mode
Table 6-3: The USB interface mode switching instructions
AC7010C / AC7020C User Manual
Instruction
FPGA core board as the main device, USB port to
connect the mouse, keyboard, USB and other slave
peripherals
FPGA core board as a slave device, USB port to
connect to the computer
25 / 40

Advertisement

Table of Contents
loading
Need help?

Need help?

Do you have a question about the AC7010C and is the answer not in the manual?

Questions and answers

Subscribe to Our Youtube Channel

This manual is also suitable for:

Ac7020c

Table of Contents