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NXP Semiconductors
Table 4. BUCK1/2 connector (J6)
Schematic label
J6-1
J6-2
J6-3
Table 5. BUCK3 connector (J8)
Schematic label
J8-1
J8-2
4.4.1.3 Debug connector (J4)
Table 6. Debug connector (J4)
Schematic label
J4-1
J4-2
J4-3
J4-4
J4-5
J4-6
J4-7
J4-8
J4-9
J4-10
J4-11
J4-12
J4-13
J4-14
J4-15
J4-16
4.4.1.4 Voltage monitoring connector (J16)
Table 7. Voltage monitoring connector (J16)
Schematic label
J16-1
J16-2
J16-3
J16-4
UM11854
User manual
Signal name
BUCK2
BUCK1
GND
Signal name
BUCK3
GND
Signal name
n.c.
VDDIO_EXT
INTB
n.c.
PWRON
I2C_SCL
AMUX_OUT
I2C_SDA
n.c.
VIN_3V3
n.c.
VMON_EXT_INPUT
n.c.
VIN_5V
n.c.
GND
Signal name
GND
INTB
GND
FS0B_out
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 9 March 2023
KITPF5030SKTEVM programming board
Description
BUCK2 regulator output
BUCK1 regulator output
Ground
Description
BUCK3 regulator output
Ground
Description
Not connected
External VDDIO voltage supply
Interrupt output pin (active low)
Not connected
PWRON input pin
2
I
C serial clock
Analog multiplexer output
2
I
C serial data
Not connected
VIN_3V3 voltage supply
Not connected
VMON_EXT voltage divider input
Not connected
VIN_5V voltage supply
Not connected
Ground
Description
Ground
Interrupt output pin (active low-logic level)
Ground
Fail-safe pin (active low-logic level)
UM11854
© 2023 NXP B.V. All rights reserved.
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