NXP Semiconductors freescale M5251C3 Manuals

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NXP Semiconductors freescale M5251C3 User Manual

NXP Semiconductors freescale M5251C3 User Manual (68 pages)

Brand: NXP Semiconductors | Category: Motherboard | Size: 1 MB

Table of Contents

Table of Contents
3
Chapter 1 M5251C3 Evaluation Board

7
- General Hardware Description
  7
- System Memory
  8
- Serial Communication Channels
  9
- Parallel I/O Ports
  9
- System Configuration
  9
- Installation and Setup
  11
- Unpacking
  11
- Preparing the Board for Use
  11
- Providing Power to the Board
  12
- Selecting Terminal Baud Rate
  12
- Terminal Character Format
  12
- Connecting the Terminal
  12
- Using a Personal Computer as a Terminal
  13
- System Power-Up and Initial Operation
  15
- M5251C3 Jumper Setup
  15
- Using the BDM Port
  17
Chapter 2 Using the Monitor/Debug Firmware

19
- What Is Dbug
  19
- Operational Procedure
  20
- System Power-Up
  20
- System Initialization
  21
- Hard RESET Button
  22
- ABORT Button
  22
- Software Reset Command
  22
- Command Line Usage
  23
- Commands
  23
- ASM (Assembler)
  24
- BC (Block Compare)
  25
- BF (Block Fill)
  25
- BM (Block Move)
  26
- BR (Breakpoints)
  27
- BS (Block Search)
  27
- DC (Data Conversion)
  28
- DI (Disassemble)
  28
- DL (Download Console)
  29
- DN (Download Network)
  29
- GO (Execute)
  30
- GT (Execute To)
  31
- IRD (Internal Register Display)
  31
- IRM (Internal Register Modify)
  31
- HELP (Help)
  32
- LR (Loop Read)
  32
- LW (Loop Write)
  32
- MD (Memory Display)
  33
- MM (Memory Modify)
  33
- MMAP (Memory Map Display)
  34
- RD (Register Display)
  34
- RM (Register Modify)
  35
- RESET (Reset the Board and Dbug)
  35
- SET (Set Configurations)
  35
- SHOW (Show Configurations)
  36
- STEP (Step Over)
  37
- SYMBOL (Symbol Name Management)
  37
- TRACE (Trace Into)
  38
- UPDBUG (Update Dbug)
  38
- UPUSER (Update User Flash)
  38
- VERSION (Display Dbug Version)
  39
- TRAP #15 Functions
  40
- In_Char
  40
- Char_Present
  41
- Exit_To_Dbug
  41
Chapter 3 Hardware Description and Reconfiguration

43
- Processor and Support Logic
  43
- Processor
  43
- Reset Logic
  43
- HIZ Signal
  44
- Clock Circuitry
  44
- Watchdog Timer
  44
- Interrupt Sources
  44
- Internal SRAM
  45
- MCF5251 Registers and Memory Map
  45
- Reset Vector Mapping
  46
- TA Generation
  47
- Wait State Generator
  47
- Sdram
  47
- Flash ROM
  47
- Serial Communication Channels
  47
- MCF5251 Uarts
  47
- QSPI Module
  48
- I2C Modules
  48
- Flexcan Modules
  48
- USB 2.0 OTG Module
  49
- General Purpose I/O Pins
  50
- Audio Module
  50
- Analog to Digital Converter (ADC) Module
  50
- Flash Memory Card/Ide Interface Module
  51
- ATA Interface Module
  51
- Real-Time Clock (RTC) Module
  51
- Debug Connector J12
  51
Appendix A Schematics

53
Appendix B Evaluation Board BOM

63

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