Part 3.10: Jtag Interface - Alinx ARTIX-7FPGA User Manual

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Part 3.10: JTAG Interface

A JTAG interface is reserved on the AX7203 FPGA carrier board for
downloading FPGA programs or firmware to FLASH. In order to prevent
damage to the FPGA chip caused by hot plugging, a protection diode is added
to the JTAG signal to ensure that the voltage of the signal is within the range
accepted by the FPGA to avoid damage of the FPGA chip.
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ARTIX-7 FPGA Development Board AX7203 User Manual
AB21
AA21
AB20
AA18
T20
W22
T21
Y21
W20
Y19
V22
T18
R14
N13
GND
+3.3V
Figure 3-10-1: JTAG Interface Schematic
10 AB22
12 AA20
14
AA19
16
AB18
18
Y17
20 W21
22 U21
24 Y22
26 W19
28 Y18
30
U22
32 R18
34 P14
36 N14
38 GND
40 +3.3V
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