Part 3.11: Xadc Interface (Not Installed By Default) - Alinx ARTIX-7FPGA User Manual

Figure 3-10-2: JTAG Interface on the carrier board
Be careful not to hot swap when JTAG cable is plugged and unplugged.

Part 3.11: XADC interface (not installed by default)

The AX7203 carrier board has an extended XADC connector interface,
and the connector uses a 2x8 0.1inch pitch double-row pin. The XADC
interface extends three pairs of ADC differential input interfaces to the 12-Bit
1Msps analog-to-digital converter of the FPGA. One pair of differential
interfaces is connected to the dedicated differential analog input channel
VP/VN of the FPGA, and the other two pairs are differentially connected to the
auxiliary analog input channels (analog channel 0 and analog channel 9).
Figure 3-11-1 shows an anti-aliasing filter designed for three differential XADC
inputs.
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ARTIX-7 FPGA Development Board AX7203 User Manual
Figure 3-11-1: Anti-Aliasing filter Schematic
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