3.3 Instruction Address Addressing
An instruction address is determined by program counter (PC) contents. PC contents are normally incremented
(+1 for each byte) automatically according to the number of bytes of an instruction to be fetched each time another
instruction is executed. When a branch instruction is executed, the branch destination information is set to the PC
and branched by the following addressing (For details of each instruction, refer to 78K/0S Series User's Manual
Instruction (U11047E)).
3.3.1 Relative addressing
[Function]
The value obtained by adding 8-bit immediate data (displacement value: jdisp8) of an instruction code to the
start address of the following instruction is transferred to the program counter (PC) and branched.
displacement value is treated as signed two's complement data (-128 to +127) and bit 7 becomes a sign bit. In
other words, the range of branch in relative addressing is between -128 and +127 of the start address of the
following instruction.
This function is carried out when the "BR $addr16" instruction or a conditional branch instruction is executed.
[Illustration]
15
15
15
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PC
When S = 0, α indicates all bits "0".
When S = 1, α indicates all bits "1".
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CHAPTER 3 CPU ARCHITECTURE
PC
+
8
7
6
α
S
User's Manual U11919EJ3V0UM00
0
... PC is the start address of
the next instruction of
a BR instruction.
0
jdisp8
0
The