Register Setting - Epson S1D13503 Technical Manual

Page 8

2.3.2 Register Setting

All register settings are completely programmable with the following exceptions:
- Memory Interface, AUX[1] bit 1 = 0 for 16-bit memory interface.
Note
This bit is forced = 0 when 16-bit CPU Interface is selected through VD0 on power-up.
- RAMS, AUX[1] bit 0, this bit is ignored in 16-bit memory configurations.
All other registers are dependent on display type, resolution, color and mode of operation, see Functional Specification for
details.
S1D13503
X18A-G-003-05
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Epson Research and Development
Vancouver Design Center
ISA Bus Interface Considerations
Issue Date: 01/01/30