Clock Input Requirements; Table 7-9: Clock Input Requirements; Figure 18: Clock Input Requirements - Epson S1D13503 Technical Manual

Epson Research and Development
Vancouver Design Center

7.2 Clock Input Requirements

Symbol
T
OSC
t
PWH
t
PWL
t
f
t
r
Hardware Functional Specification
Issue Date: 01/01/29
Downloaded from Elcodis.com electronic components distributor
Clock Input Waveform
90%
V
IH
V
IL
10%
t
r

Figure 18: Clock Input Requirements

Table 7-9: Clock Input Requirements

Parameter
Input Clock Period (CLKI)
Input Clock Pulse Width High (CLKI)
Input Clock Pulse Width Low (CLKI)
Input Clock Fall Time (10% - 90%)
Input Clock Rise Time (10% - 90%)
t
PWH
t
f
T
OSC
Min
40
40%
40%
t
PWL
Typ Max
60%
60%
5
5
Page 37
Units
ns
T
OSC
T
OSC
ns
ns
S1D13503
X18A-A-001-08