Change To Table 19 - Analog Devices ADM1060 Manual

Communications system supervisory/sequencing circuit
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POSITIVE VOLTAGE SUPPLY FAULT DETECT (PSn SFD) REGISTERS
Table 15. Register 0xB8, 0xC0, 0xC8, 0xD0 PSnOVTH
(Power-On Default 0xFF)
Bit
Name
R/W
Description
7−0
OV7−OV0
R/W
8-Bit Digital Value for OV Thresh-
old on PSn SFD.
Table 16. Register 0xB9, 0xC1, 0xC9, 0xD1 PSnOVHYST
(Power-On Default 0x00)
Bit
Name
R/W
Description
7–5
Reserved
N/A
Cannot Be Used
4−0
HY4−HY0
R/W
5-Bit Digital Value for Hysteresis
on OV Threshold of PSn SFD
Table 19. Register 0xBC, 0xC4, 0xCC, 0xD4 PSnSEL (Power-On Default 0x00)
Bit
Name
R/W
7
Reserved
N/A
6−4
GF2−GF0
R/W
3−2
RSEL1−RESL0
R/W
1–0
FS1−FS0
R/W
Description
Cannot Be Used
GF2
GF1
0
0
0
0
0
1
0
1
1
0
1
0
1
1
1
1
RSEL1
RSEL0
0
0
0
1
1
X
FS1
FS0
0
0
0
1
1
0
1
1
Rev. B | Page 17 of 52
Table 17. Register 0xBA, 0xC2, 0xCA, 0xD2 PSnUVTH
(Power-On Default 0x00)
Bit
Name
W
Description
7−0
UV7−UV0
R/W
8-Bit Digital Value for UV Thresh-
old on PSn SFD
Table 18. Register 0xBB, 0xC3, 0xCB, 0xD3 PSnUVHYST
(Power-On Default 0x00)
Bit
Name
W
Description
7−5
Reserved
N/A
Cannot Be Used
4−0
HY4−HY0
R/W
5-Bit Digital Value for Hysteresis
on UV Threshold of PSn SFD
GF0
Glitch Filter Delay (µs)
0
0
1
5
0
10
1
20
0
30
1
50
0
75
1
100
Bottom of Range
Top of Range
2 V
6 V
1 V
3 V
0.6 V
1.8 V
Fault Select Type
Overvoltage
Undervoltage
Out-of-Window
Not Allowed
ADM1060
Step Size (mV)
15.6
7.8
4.7

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