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Express-TL User's Guide
4.4.5
DDI3 Port
Name
Pin #
DDI3_PAIR0+
C39
DDI3_PAIR0-
C40
DDI3_PAIR1+
C42
DDI3_PAIR1-
C43
DDI3_PAIR2+
C46
DDI3_PAIR2-
C47
DDI3_PAIR3+
C49
DDI3_PAIR3-
C50
DDI3_HPD
C44
DDI3_CTRLCLK_AUX+
C36
DDI3_CTRLCLK_AUX-
C37
DDI3_DDC_AUX_SEL
C38
Note:
Dual Mode (HDMI and DisplayPort on the same pins) implementations may be realized. This is desirable for SOCs that natively implement this
capability. With such SOCs, the primary Dual Mode implementation challenge is that the HDMI_CTRL_DAT and HDMI_CTRL_CK lines are DC
coupled, but the DP_AUX+ /- pair must be AC coupled. A set of FET switches is usually used to sort this out. The FET gates can be controlled by
the AUX_SEL pin function.
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DisplayPort (DP)
HDMI
DP3_LANE0+
TMDS3_DATA2+
DP3_LANE0-
TMDS3_DATA2-
DP3_LANE1+
TMDS3_DATA1+
DP3_LANE1-
TMDS3_DATA1-
DP3_LANE2+
TMDS3_DATA0+
DP3_LANE2-
TMDS3_DATA0-
DP3_LANE3+
TMDS3_CLK+
DP3_LANE3-
TMDS3_CLK-
DP3_HPD
HDMI3_HPD
DP3_AUX+
HMDI3_CTRLCLK
DP3_AUX-
HMDI3_CTRLDATA
DDI3_DDC_AUX_SEL
DDI3_DDC_AUX_SEL
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PICMG COM.0 R3.0
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