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Figure 3-9-1: HDMI Input Interface Schematic
ZYNQ pin assignment:
Signal Name
9013_nRESET
HDMI_RX_RSTN
HDMI_IN_CLK
HDMI_IN_HS
HDMI_IN_VS
HDMI_IN_DE
HDMI_IN_D0
HDMI_IN_D1
HDMI_IN_D2
HDMI_IN_D3
HDMI_IN_D4
HDMI_IN_D5
HDMI_IN_D6
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ZYNQ Ultrascale + FPGA Board AXU5EV-P User Manual
ZYNQ Pin
ZYNQ Pin
Name
Number
B11_L19_P
B43_L7_N
B43_L8_P
B44_L12_N
B44_L12_P
B44_L7_P
B44_L10_P
B44_L10_N
B44_L7_N
B43_L6_P
B44_L6_P
B44_L6_N
B43_L6_N
AB21
AD10
HDMI Input Video Signal Clock
AB11
Line Synchronization
AA12
Y12
HDMI Input Video Signal Enable
AA13
HDMI Input Video Signal Data0
Y14
HDMI Input Video Signal Data1
Y13
HDMI Input Video Signal Data2
AB13
HDMI Input Video Signal Data3
AC12
HDMI Input Video Signal Data4
AC14
HDMI Input Video Signal Data5
AC13
HDMI Input Video Signal Data6
AD12
HDMI Input Video Signal Data7
Description
HDMI Reset Signal
HDMI Input Video Signal
HDMI Input Video Signal
Column Synchronization
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