Alinx ZYNQ UltraScale+ User Manual page 24

Fpga development board
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Position
U19
The eMMC FLASH is connected to the GPIO port of the BANK500 of the
PS part of the ZYNQ UltraScale+. In the system design, it is necessary to
configure the GPIO port function of the PS side as an EMMC interface. Figure
2-5-1 shows the part of eMMC Flash in the schematic diagram.
Configuration Chip pin assignment:
Signal Name
MIO0_QSPI0_SCLK
MIO1_QSPI0_IO1
MIO2_QSPI0_IO2
MIO3_QSPI0_IO3
MIO4_QSPI0_IO0
MIO5_QSPI0_SS_B
24 / 66
ZYNQ Ultrascale + FPGA Board AXU5EV-P User Manual
Model
MTFC8GAKAJCN-4M
Table 2-5-1: eMMC FLASH Specification
Figure 2-5-1: QSPI Flash in the schematic
Capacity
8G Byte
Pin Name
PS_MIO0_500
PS_MIO1_500
PS_MIO2_500
PS_MIO3_500
PS_MIO4_500
PS_MIO5_500
Factory
Micron
Pin Number
AG15
AG16
AF15
AH15
AH16
AD16
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