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A
3.3V
R152
DSP OSC
10K
805
R68
U16
33
1
805
1
5
OE
OUT
24.576MHZ
24.576MHZ
OSC001
When designing your JTAG interface please refer to the
Engineer to Engineer Note EE-68 which can be found at
http://www.analog.com
2
3.3V
R75
R77
R71
10K
10K
10K
805
805
805
DNP
EMU
TMS
TCK
TRST
TDI
TDO
R189
R72
1.5K
4.7K
805
805
3
3.3V_DSP
3.3V
C140
C146
C139
C137
C150
C138
0.1UF
1000PF
1000PF
1000PF
1000PF
0.01UF
4
402
402
402
402
402
402
OSC
ADSP-21364
A
B
DSP_CLKIN
U1
AD0
M1
P7
AD[0:15]
AD0
DAIP1/SD0A
AD1
L2
N8
AD1
DAIP2/SD0B
AD2
L1
P8
AD2
DAIP3/SCLK0
AD3
K1
N10
AD3
DAIP4/SFS0
AD4
J2
P9
AD4
DAIP5/SD1A
AD5
J1
P10
AD5
DAIP6/SD1B
AD6
H1
P11
AD6
DAIP7/SCLK1
AD7
G1
P12
AD7
DAIP8/SFS1
AD8
N6
P13
AD8
DAIP9/SD2A
AD9
P6
N14
AD9
DAIP10/SD2B
AD10
P5
P14
AD10
DAIP11/SD3A
AD11
P4
M13
AD11
DAIP12/SD3B
AD12
P3
M14
AD12
DAIP13/SCLK23
AD13
P2
L14
AD13
DAIP14/SFS23
AD14
P1
K14
AD14
DAIP15/SD4A
AD15
N1
J14
AD15
DAIP16/SD4B
H14
DAIP17/SD5A
N3
H13
RD
RD
DAIP18/SD5B
M2
G14
WE
WR
DAIP19/SCLK45
N2
F14
ALE
ALE
DAIP20/SFS45
A8
A10
EMU
MISO
A3
A9
TMS
MOSI
A4
B9
TCK
SPICLK
B5
A11
TRST
SPIDS
A5
TDI
A7
F2
TDO
FLAG0
F1
FLAG1
A6
F13
DSP_CLKOUT
CLKOUT
FLAG2
E14
FLAG3
B4
C2
DSP_CLKIN
CLKIN
BOOTCFG0
A2
C1
XTAL
BOOTCFG1
A1
CLKCFG0
B10
B1
RESET
RESET
CLKCFG1
ADSP-21364
BGA136
C45
0.1UF
805
DNP
C149
C129
C136
C145
C135
C143
C154
0.01UF
0.1UF
0.1UF
10UF
1000PF
1000PF
1000PF
402
402
402
805
402
402
402
ADSP-21364
B
DAIP1_SPDIF_OUT
DAIP2
DAIP3
DAIP4
DAIP5_ADC_DATA
DAIP6_AD1835_MCLK
DAIP7_ADC_BCLK
DAIP8_ADC_LRCLK
DAIP9_DAC_D4
DAIP10_DAC_D3
DAIP11_DAC_D2
DAIP12_DAC_D1
3.3V
DAIP13_DAC_BCLK
DAIP14_DAC_LRCLK
DAIP15
DAIP16
DAIP17_AUDIO_OSC
R78
10K
DAIP18_SPDIF_IN
805
DAIP19_SW3
DAIP20_SW4
MISO
3.3V
MOSI
SPICLK
SPIDS
FLAG0_SPI_FLASH_CS
FLAG1_SW1
FLAG2_SW2
R158
R157
1.2K
1.2K
FLAG3_AD1835_SPI_CS
805
805
SW10
1
8
2
7
3
6
4
5
SWT018
DIP4
SW10: BOOT/CLOCK RATIO SELECT
(Default: 1=OFF, 2=ON, 3=OFF, 4=OFF)
R159
R160
R161
R162
10K
10K
10K
10K
1
805
805
805
805
BOOTCFG0
OFF
ON
OFF
ON
3
1.2V_DSP
CLKCFG0
OFF
ON
OFF
ON
C130
C151
C134
C128
C142
C26
1000PF
0.01UF
0.01UF
0.1UF
0.1UF
10UF
402
402
402
402
402
805
C
3.3V
R79
0.00
805
P7
1
IDC2X1
2X1
DNP
3.3V_DSP
B3
B8
G13
1.2V_DSP
H2
N5
N9
A12
B11
C14
D1
D14
E1
G2
J13
Place as close as possible to pin B07 and B06 of DSP
K2
N4
N7
R150
10
N11
805
N12
B7
B6
C147
C144
0.01UF
0.1UF
A13
402
402
A14
B2
B12
R156
R155
B13
1.2K
1.2K
805
805
B14
C3
C12
C13
D2
D4
D5
D6
D9
D10
2
BOOTCFG1
BOOTMODE
OFF
SPI SLAVE BOOT
OFF
SPI MASTER BOOT
ON
PARALLEL PORT BOOT
DEFAULT
ON
RESERVED
4
CLOCK RATIO
CLKCFG1
CORE:CLKIN
OFF
6:1
DEFAULT
OFF
32:1
ON
16:1
ON
RESERVED
ANALOG
DEVICES
Title
Size
Board No.
C
Date
7-8-2004_8:55
C
D
3.3V_DSP
1.2V_DSP
1.2V
D3
SK12
R80
1A
0.00
DO-214AA
805
P8
2
1
2
IDC2X1
2X1
DNP
U1
D11
VDDEXT1
GND16
D13
VDDEXT2
GND17
E2
VDDEXT3
GND18
E4
VDDEXT4
GND19
E5
VDDEXT5
GND20
E6
VDDEXT6
GND21
E9
GND22
E10
VDDINT1
GND23
E11
VDDINT2
GND24
E13
VDDINT3
GND25
F4
VDDINT4
GND26
F5
VDDINT5
GND27
F6
VDDINT6
GND28
F9
VDDINT7
GND29
F10
VDDINT8
GND30
F11
VDDINT9
GND31
J4
VDDINT10
GND32
J5
VDDINT11
GND33
J6
VDDINT12
GND34
J9
VDDINT13
GND35
J10
GND36
J11
AVDD
GND37
K4
AVSS
GND38
K5
GND39
K6
GND1
GND40
K9
GND2
GND41
K10
GND3
GND42
K11
GND4
GND43
K13
GND5
GND44
L4
GND6
GND45
L5
GND7
GND46
L6
GND8
GND47
L9
GND9
GND48
L10
GND10
GND49
L11
GND11
GND50
L13
GND12
GND51
M3
GND13
GND52
M12
GND14
GND53
N13
GND15
GND54
ADSP-21364
BGA136
DNP = Do Not Populate
20 Cotton Road
Nashua, NH 03063
PH: 1-800-ANALOGD
ADSP-21364 EZ-KIT Lite
DSP
Rev
A0190-2004
1.1
Sheet
2
of
12
D
1
2
3
4
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