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VisualDSP++ Interface
Table 1-10. Global Hardware Breakpoint Options
Option
Skip N Breakpoint
Events
Restore Skip Count
on Break
AND All Break-
points
Table 1-11. Hardware Breakpoint Restrictions
Category
Latency
Placement
1-20
Description
Sets the Skip Count—specifies the number of breakpoint events to be
ignored before stopping the processor. Each time a hardware breakpoint
condition occurs, the count decrements. When the count reaches zero (
the processor processes the hardware break. Use this option to count the
number of times a break operation occurs. Breakpoints within the group
are ORed together to create this condition.
When checked, causes the emulator to restore the Skip Count to the value
at program restart. Otherwise, the Skip Count remains at its current value.
ANDs the interrupts to form the composite interrupt. Normally, the group
interrupts are ORed to create a composite interrupt.
Description
For SHARC processors, hardware breakpoints do not assert until two (2)
instruction cycles after the actual break condition occurs.
• Do not place hardware breaks at any address where a
instruction is illegal.
IDLE
• Do not place breaks in the last few instructions of a
delay slots of a delayed branch. For more information on these illegal
locations, refer to the Hardware Reference manual for the target proces-
sor.
• To set a breakpoint on a single address, set the Start Address equal to
the End Address.
ADSP-21364 EZ-KIT Lite Evaluation System Manual
),
0
,
, or
JUMP
CALL
or in the
DO LOOP
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