Sram Interface; Parallel Flash Memory Interface - Analog Devices ADSP-21479 EZ-Board Manual

For more information on changing the reset values, refer to the online
help.
An example program is included in the EZ-Board installation directory to
demonstrate how to setup and access the SDRAM interface.
For more information on how to initialize the registers after a reset, search
the online help for "reset values".

SRAM Interface

The board has a 1M x 16-bit flash memory connected to the processor's
asynchronous memory interface (AMI). The SRAM can be accessed via
the asynchronous memory select 3 pin. It allows access to 16 bits of data
and interfaces to address line 0 through 19 of the processor.
An example program is included in the EZ-Board installation directory to
demonstrate how to setup and access the SRAM interface. For more infor-
mation on how to initialize the registers after a reset, search the online
help for "reset values".

Parallel Flash Memory Interface

The parallel flash memory interface of the ADSP-21479 EZ-Board con-
tains a 4 MB (4M x 8 bits) Numonyx M29W320EB chip. Flash memory
is connected to the 8-bit data bus and address lines 0 through 21. Chip
enable is decoded by the
position 2. See
address range for flash memory is
Flash memory is pre-loaded with boot code for the power-on-self test
(POST) program. For more information, refer to
on page 1-27.
ADSP-21479 EZ-Board Evaluation System Manual
select line (default) through switch
MS1
"External Port Enable Switch (SW13)" on page
Using The ADSP-21479 EZ-Board
to
0x0400 0000 0x043F FFFF
"Power-On-Self Test"
SW13
2-12. The
.
1-15