Quectel LTE-A Module Series Hardware Design page 20

7 USB_D+ USB_DP
8 W_DISABLE1# W_DISABLE1#
9 USB_D- USB_DM
10 GPIO_9 WWAN_LED#
11 GND GND
12 Key Notch
13 Key Notch
14 Key Notch
15 Key Notch
16 Key Notch
17 Key Notch
18 Key Notch
19 Key Notch
GPIO_5
20 PCM_CLK
(AUDIO_0)
21 CONFIG_0 CONFIG_0
GPIO_6
22 PCM_DIN
(AUDIO_1)
GPIO_11 WAKE_ON_
23
(WOWWAN#) WAN#
GPIO_7 PCM_DOUT
24
(AUDIO_2) /VDDIO
EM120R-GL&EM160R-GL_Hardware_Design
LTE-A Module Series
EM120R-GL&EM160R-GL Hardware Design
off.
When it is at high level,
the module is powered
on.
USB 2.0 differential data
AI/AO
bus (+)
Airplane mode control.
DI
Active low.
USB 2.0 differential data
AI/AO
bus (-)
RF status indication.
OD
Active low.
Ground
Notch
Notch
Notch
Notch
Notch
Notch
Notch
Notch
PCM data bit clock.
In master mode, it is an
DI
output signal.
In slave mode, it is an
input signal.
EM120R-GL: Connected
to GND internally;
EM160R-GL: NC
PO PCM data input
Wake up the host.
OD
Active low.
PCM data output;
Could be designed to be
DO/P
O
compatible with 1.8 V
power supply.
1.8/3.3 V power
domain
1.8 V power
domain.
If unused, keep it
open.
1.8 V power
domain
1.8/3.3 V power
domain
1.8 V power
domain
19 / 79