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Quectel LTE-A Series Hardware Design

Quectel LTE-A Series Hardware Design

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EM121R-GL
Hardware Design
LTE-A Module Series
Version: 1.0.0
Date: 2021-04-07
Status: Preliminary

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Summary of Contents for Quectel LTE-A Series

  • Page 1 EM121R-GL Hardware Design LTE-A Module Series Version: 1.0.0 Date: 2021-04-07 Status: Preliminary...
  • Page 2 To the maximum extent permitted by law, Quectel excludes all liability for any loss or damage suffered in connection with the use of the functions and features under development, regardless of whether such loss or damage may have been foreseeable.
  • Page 3 EM121R-GL Hardware Design Copyright The information contained here is proprietary technical information of Quectel. Transmitting, reproducing, disseminating and editing this document as well as using the content without permission are forbidden. Offenders will be held liable for payment of damages. All rights are reserved in the event of a patent grant or registration of a utility model or design.

  • Page 4: Safety Information

    Manufacturers of the cellular terminal should notify users and operating personnel of the following safety information by incorporating these guidelines into all manuals of the product. Otherwise, Quectel assumes no liability for customers’ failure to comply with these precautions.

  • Page 5: About The Document

    LTE-A Module Series EM121R-GL Hardware Design About the Document Revision History Version Date Author Description Jim HAN/ 2021-04-07 Kingson ZHANG Creation of the document Alex WANG Jim HAN/ 1.0.0 2021-04-07 Kingson ZHANG/ Preliminary Alex WANG EM121R-GL Hardware Design 4 / 80...

  • Page 6: Table Of Contents

    LTE-A Module Series EM121R-GL Hardware Design Contents Safety Information ............................3 About the Document ........................... 4 Contents ............................... 5 Table Index ..............................8 Figure Index ............................... 10 Introduction ............................12 1.1. Introduction ..........................12 1.2. Reference Standard ........................12 1.3. Special Mark ..........................
  • Page 7 LTE-A Module Series EM121R-GL Hardware Design 4.3. PCIe Interface ........................... 41 4.3.1. Pin definition of PCIe ...................... 41 4.3.2. Reference Design for PCIe .................... 42 4.3.3. PCIe Timing ........................43 4.3.3.1. PCIe Turn-on Timing ................... 43 4.3.3.2. PCIe Turn-off Timing ................... 44 4.3.3.3.
  • Page 8 LTE-A Module Series EM121R-GL Hardware Design 6.4. Electrostatic Discharge ......................72 6.5. Thermal Dissipation ........................72 6.6. Absolute Maximum Ratings ...................... 74 6.7. Operating and Storage Temperatures ..................74 Mechanical Dimensions and Packaging ..................75 7.1. Mechanical Dimensions of the Module ..................75 7.2.
  • Page 9 LTE-A Module Series EM121R-GL Hardware Design Table Index Table 1: Special Mark..........................13 Table 2: Frequency Bands and GNSS Types of EM121R-GL ..............14 Table 3: Key Features of EM121R-GL ....................... 15 Table 4: Definition of I/O Parameters ......................20 Table 5: Pin Description ..........................
  • Page 10 LTE-A Module Series EM121R-GL Hardware Design Table 45: Antenna Requirements of EM121R-GL ..................68 Table 47: Power Supply Requirements ..................... 70 Table 48: EM121R-GL Current Consumption (PCIe Only Version, 3.3 V Power Supply) ......70 Table 49: EM121R-GL Current Consumption (USB Only Version, 3.7 V Power Supply) ......71 Table 50: Logic Levels of Digital I/O (1.8 V) ....................
  • Page 11 LTE-A Module Series EM121R-GL Hardware Design Figure Index Figure 1: Functional Diagram ........................18 Figure 2: Pin Assignment ........................... 19 Figure 3: DRX Run Time and Current Consumption in Sleep Mode ............26 Figure 4: Sleep Mode Application with USB Remote Wakeup ..............26 Figure 5: Power Supply Limits during Radio Transmission ...............
  • Page 12 LTE-A Module Series EM121R-GL Hardware Design Figure 43: Tray Size (Unit: mm) ......................... 77 Figure 44: Tray Packaging Procedure ....................... 77 EM121R-GL Hardware Design 11 / 80...

  • Page 13: Introduction

    LTE-A Module Series EM121R-GL Hardware Design Introduction 1.1. Introduction The hardware design defines EM121R-GL and describes the air and hardware interfaces which are connected with customers’ applications. This document helps you quickly understand the interface specifications, electrical and mechanical details, as well as other related information of EM121R-GL. To facilitate its application in different fields, reference design is also provided for reference.

  • Page 14: Special Mark

    LTE-A Module Series EM121R-GL Hardware Design 1.3. Special Mark Table 1: Special Mark Mark Definition When an asterisk (*) is used after a function, feature, interface, pin name, AT command, or argument, it indicates that the function, feature, interface, pin name, AT command, or argument is under development and currently not supported, unless otherwise specified.

  • Page 15: Product Concept

    LTE-A Module Series EM121R-GL Hardware Design Product Concept 2.1. General Description EM121R-GL is a LTE-A/UMTS/HSPA+ wireless communication module with receive diversity. It provides data connectivity on LTE-FDD, LTE-TDD, DC-HSDPA, HSPA+, HSDPA, HSUPA and WCDMA networks. They are standard WWAN M.2 Key-B modules. For more details, see PCI Express M.2 Specification Revision 2.0, Version 1.2.

  • Page 16: Key Features

    LTE-A Module Series EM121R-GL Hardware Design voice and data functions, while Data-only version only supports data function. LTE-FDD B29/B32 and LTE-TDD B46 support Rx only and are only for secondary component carrier. 4. For details about CA combinations, see document [1]. EM121R-GL can be applied in the following fields: ⚫...
  • Page 17 ⚫ Data update rate: 1 Hz ⚫ Compliant with 3GPP TS 27.007 and 3GPP TS 27.005 AT Commands ⚫ Quectel enhanced AT commands Internet Protocol QMI/MBIM/NITZ/PING/HTTP/HTTPS protocols Features Firmware Upgrade USB 2.0 interface, PCIe interface and DFOTA EM121R-GL Hardware Design...
  • Page 18 LTE-A Module Series EM121R-GL Hardware Design ⚫ Text and PDU modes ⚫ Point-to-point MO and MT ⚫ SMS cell broadcast ⚫ SMS storage: ME by default ⚫ M.2 Key-B Physical ⚫ Size: (30.0 ± 0.15) mm × (42.0 ± 0.15) mm × (2.3 ± 0.2) mm Characteristics ⚫...

  • Page 19: Functional Diagram

    LTE-A Module Series EM121R-GL Hardware Design 2.3. Functional Diagram The following figure shows a functional diagram of EM121R-GL. ⚫ Power management ⚫ Baseband ⚫ LPDDR4X SDRAM + NAND Flash ⚫ Radio frequency ⚫ M.2 Key-B interface FULL_CARD_POWER_OFF# PMIC RESET# 38.4MHz XO 4Gb 8 bit NAND Flash 2Gb 16 bit LPDDR4X SDRAM (U)SIM1...

  • Page 20: Pin Assignment

    LTE-A Module Series EM121R-GL Hardware Design 2.4. Pin Assignment The following figure shows the pin assignment of the module. The top side contains module and antenna connectors. Pin Name Pin Name CONFIG_2 CONFIG_1 ANT_CONFIG RESET# USIM1_DET ANTCTL3 COEX_TXD ANTCTL2 COEX_RXD ANTCTL1 WLAN_PA_EN PIN75...

  • Page 21: Pin Description

    LTE-A Module Series EM121R-GL Hardware Design 2.5. Pin Description Table 4: Definition of I/O Parameters Type Description Analog Input Analog Output Analog Input/Output Digital Input Digital Output Digital Input/Output Open Drain Power Input Power Output Pull Up Pull Down The following table shows the pin definition and description of the module. Table 5: Pin Description Pin Name Description...
  • Page 22 LTE-A Module Series EM121R-GL Hardware Design Ground Turn on/off the module. max = 4.4 V Internally pulled FULL_CARD_ DI, PD High level: Turn on min = 1.19 V down with a POWER_OFF# 100 kΩ resistor. Low level: Turn off max = 0.2 V USB_DP USB differential data (+) Airplane mode control.
  • Page 23 LTE-A Module Series EM121R-GL Hardware Design Ground PCM_SYNC* DIO, PD PCM data frame sync 1.8 V USB 3.0 super-speed USB_SS_TX_M transmit (-) USIM1_VDD USIM1_RST DO, PD (U)SIM1 card reset 1.8/3.0 V USB 3.0 super-speed USB_SS_TX_P transmit (+) USIM1_VDD USIM1_CLK DO, PD (U)SIM1 card clock 1.8/3.0 V Ground...
  • Page 24 LTE-A Module Series EM121R-GL Hardware Design PCIe reset. PCIE_RST_N DI, OD Active LOW. Ground PCIe clock request. PCIE_CLKREQ_N DO, OD Active LOW. PCIE_REFCLK_M PCIe reference clock (-) PCIe wake up. PCIE_WAKE_N DO, OD Active LOW. PCIe reference clock PCIE_REFCLK_P Used for external MIPI 2) * RFFE_CLK DO, PD...

  • Page 25: Evaluation Board

    EM121R-GL does not support this function, please keep it unconnected. Keep all NC, reserved and unused pins unconnected. 2.6. Evaluation Board To help you develop applications conveniently with EM121R-GL, Quectel supplies an evaluation board (PCIE-CARD-EVB). For more details, see document [2]. EM121R-GL Hardware Design...

  • Page 26: Operating Characteristics

    LTE-A Module Series EM121R-GL Hardware Design Operating Characteristics 3.1. Operating Modes The table below briefly summarizes the various operating modes of EM121R-GL. Table 6: Overview of Operating Modes Mode Details Software is active. The module has registered on the network, Idle and it is ready to send and receive data.
  • Page 27 LTE-A Module Series EM121R-GL Hardware Design DRX OFF Run Time Figure 3: DRX Run Time and Current Consumption in Sleep Mode The following part of this section describes the power saving procedure and sleep mode entrance of the module. If the host supports USB suspend/resume and remote wakeup function, the following two conditions must be met to make the module enter sleep mode.

  • Page 28: Airplane Mode

    LTE-A Module Series EM121R-GL Hardware Design 3.1.2. Airplane mode The module provides a W_DISABLE1# pin to disable or enable airplane mode through hardware operation. See Chapter 4.5.1 for more details. 3.2. Communication Interface with the Host The module supports to communicate through both USB and PCIe interfaces, respectively referring to the USB mode and the PCIe mode as described below: USB Mode ⚫...

  • Page 29: Decrease Voltage Drop

    LTE-A Module Series EM121R-GL Hardware Design 3.3.1. Decrease Voltage Drop The power supply range of the module is from 3.135 V to 4.4 V. Please ensure that the input voltage will never drop below 3.135 V, otherwise the module will be powered off automatically. The following figure shows the maximum voltage drop during radio transmission in 3G/4G networks.

  • Page 30: Reference Design For Power Supply

    LTE-A Module Series EM121R-GL Hardware Design 3.3.2. Reference Design for Power Supply Power design is important for the module, as the performance of the module largely depends on the power source. If the voltage difference between the input and output is not too high, it is suggested that an LDO is used when supplying power for the module.
  • Page 31 LTE-A Module Series EM121R-GL Hardware Design Table 8: Pin Definition of FULL_CARD_POWER_OFF# Pin Name Description Comment Characteristics Turn on/off the module. max = 4.4 V FULL_CARD_ Pull down with a DI, PD High level: Turn on min = 1.19 V 100 kΩ...

  • Page 32: Turn Off

    LTE-A Module Series EM121R-GL Hardware Design 3.5. Turn off For the design that turns on the module with a host GPIO, when the power is supplied to VCC, pulling down FULL_CARD_POWER_OFF# pin will turn off the module. The timing of turn-off scenario is illustrated in the following figure. Running Turn-off procedure Figure 10: Turn-off Timing through FULL_CARD_POWER_OFF#...
  • Page 33 LTE-A Module Series EM121R-GL Hardware Design NOTE Triggering the RESET# signal will lead to loss of all data in the modem and removal of system drivers. It will also disconnect the modem from the network. The module can be reset by pulling down the RESET# pin for 250–600 ms. An open collector/drain driver or a button can be used to control the RESET# pin.
  • Page 34 LTE-A Module Series EM121R-GL Hardware Design RESET# Module Status Running Resetting Restarting Figure 13: Reset Timing of the Module Table 12: Reset Timing of the Module Symbol Min. Typ. Max. Comment RESET# should be pulled down for 250–600 ms. An asserting time of less than 200 ms is unreliable, 250 ms 500 ms...

  • Page 35: Application Interfaces

    LTE-A Module Series EM121R-GL Hardware Design Application Interfaces The physical connections and signal levels of EM121R-GL comply with PCI Express M.2 specification. This chapter mainly describes the definition and application of the following interfaces/pins of the module: ⚫ (U)SIM interfaces ⚫...

  • Page 36: U)Sim Hot-Plug

    LTE-A Module Series EM121R-GL Hardware Design USIM2_VDD USIM2_DATA DIO, PU (U)SIM2 card data 1.8/3.0 V USIM2_VDD USIM2_CLK DO, PD (U)SIM2 card clock 1.8/3.0 V USIM2_VDD USIM2_RST DO, PD (U)SIM2 card reset 1.8/3.0 V USIM2_VDD (U)SIM2 card power supply 1.8/3.0 V EM121R-GL supports (U)SIM card hot-plug via the USIM1_DET pin, which is a level triggered pin.

  • Page 37: Normally Closed (U)Sim Card Connector

    LTE-A Module Series EM121R-GL Hardware Design Maximum Response Time 300 ms The command takes effect after the module is restarted. Characteristics The configuration will be saved to NVRAM automatically. Parameter <enable> Integer type. Enable or disable (U)SIM card detection. Disable Enable <insert_level>...

  • Page 38: Normally Open (U)Sim Card Connector

    LTE-A Module Series EM121R-GL Hardware Design USIM_VDD Module (U)SIM Card Connector 100 nF 10-20k USIM_VDD USIM_RST USIM_CLK USIM_DET USIM_DATA Note: All these resistors, capacitors and TVS should be close to (U)SIM card connector in PCB layout. Figure 14: Reference Circuit for Normally Closed (U)SIM Card Connector 4.1.4.

  • Page 39: U)Sim Card Connector Without Hot-Plug

    LTE-A Module Series EM121R-GL Hardware Design 4.1.5. (U)SIM Card Connector Without Hot-plug If the (U)SIM card detection function is not needed, please keep USIM_DET unconnected. A reference circuit for the (U)SIM card interface with a 6-pin (U)SIM card connector is illustrated by the following figure.

  • Page 40: U)Sim Design Notices

    LTE-A Module Series EM121R-GL Hardware Design 4.1.7. (U)SIM Design Notices To enhance the reliability and availability of the (U)SIM card in applications, please follow the criteria below in (U)SIM circuit design. ⚫ Place the (U)SIM card connector as close to the module as possible. Keep the trace length less than 200 mm.
  • Page 41 LTE-A Module Series EM121R-GL Hardware Design USB_SS_RX_P USB 3.0 super-speed receive (+) For more details about the USB 3.0 & 2.0 specifications, please visit http://www.usb.org/home. The USB 2.0 interface is recommended to be reserved for firmware upgrade in designs. The following figure presents a reference circuit for the USB 3.0 &...

  • Page 42: Pcie Interface

    LTE-A Module Series EM121R-GL Hardware Design than 1.0 pF for USB 2.0, and less than 0.15 pF for USB 3.0. ⚫ Keep the ESD protection devices as close to the USB connector as possible. ⚫ If possible, reserve 0 Ω resistors on USB_DP and USB_DM lines respectively. 4.3.

  • Page 43: Reference Design For Pcie

    LTE-A Module Series EM121R-GL Hardware Design 4.3.2. Reference Design for PCIe The following figure shows a reference circuit for the PCIe interface. Host Module 0 Ω PCIE_REFCLK_P PCIE_REFCLK_P 0 Ω PCIE_REFCLK_M PCIE_REFCLK_M PCIE_RX_P C5 100 nF PCIE_TX_P PCIE_RX_M C6 100 nF PCIE_TX_M PCIE_TX_P C1 100 nF...

  • Page 44: Pcie Timing

    LTE-A Module Series EM121R-GL Hardware Design 4.3.3. PCIe Timing The following figure is PCIe power-on timing sequence for an adapter powered from system power rail in PCI Express M.2 specification. Figure 20: PCIe Power-on Timing Requirements of M.2 Specification The following table is power-on timing variables in PCI Express M.2 specification. Table 16: Power-up Timing of M.2 Specification Symbol Min.

  • Page 45: Pcie Turn-Off Timing

    LTE-A Module Series EM121R-GL Hardware Design FULL_CARD_POWER_OFF# RESET# PCIE_RST_N Typical 11.6 s Module State Booting Active Figure 21: PCIe Turn-on Timing of the Module Table 17: PCIe Turn-on Timing of the Module Index Min. Typ. Max. Comment 0 ms 50 ms The module is turning on.

  • Page 46: Pcie Reset Timing

    LTE-A Module Series EM121R-GL Hardware Design RESET# FULL_CARD_POWER_OFF# PCIE_RST_N Module State Active Power off procedure Figure 22: PCIe Turn-off Timing through FULL_CARD_POWER_OFF# Table 18: PCIe Turn-off Timing through FULL_CARD_POWER_OFF# Index Min. Typ. Max. Comment 20 ms PCIe interface is disabled by asserting PCIE_RST_N. Module is powering off and it stops reading and writing Flash, data protection, etc.

  • Page 47: Pcie Modern Standby Timing

    LTE-A Module Series EM121R-GL Hardware Design Table 19: PCIe Reset Timing Index Min. Typ. Max. Comment 20 ms PCIe interface is disabled by asserting PCIE_RST_N. 0 ms Module is reset by asserting RESET#. 0 ms T3 could be ignored. 100 ms De-assert PCIE_RST_N 100 ms after de-asserting RESET#.

  • Page 48: Pcm Interface

    LTE-A Module Series EM121R-GL Hardware Design VCC(H) FULL_CARD_POWER_OFF#(H) RESET#(H) PCIE_RST_N Module State D3 hot D3 cold Figure 25: PCIe D3 Cold Timing 4.4. PCM Interface* The module supports audio communication via Pulse Code Modulation (PCM) digital interface. The PCM interface supports the following modes: ⚫...
  • Page 49 LTE-A Module Series EM121R-GL Hardware Design 125 μs PCM_CLK PCM_SYNC PCM_DOUT PCM_DIN Figure 26: Primary Mode Timing 125 μs PCM_CLK PCM_SYNC PCM_DOUT PCM_DIN Figure 27: Auxiliary Mode Timing The following table shows the pin definition of PCM interface which can be applied to audio codec design. Table 20: Pin Definition of PCM Interface Pin No.

  • Page 50: Control And Indication Interfaces

    LTE-A Module Series EM121R-GL Hardware Design The clock and mode can be configured by AT command, and the default configuration is master mode using short frame synchronization format with 2048 kHz PCM_CLK and 8 kHz PCM_SYNC. See document [3] for details about AT+QDAI command. 4.5.

  • Page 51: W_Disable2

    LTE-A Module Series EM121R-GL Hardware Design AT+CFUN=0 High Level Disabled AT+CFUN=4 AT+CFUN=0 Low Level AT+CFUN=1 Disabled AT+CFUN=4 4.5.2. W_DISABLE2# The module provides a W_DISABLE2# pin to disable or enable the GNSS function. The W_DISABLE2# pin is pulled up by default. Driving it low will disable the GNSS function. The combination of W_DISABLE2# pin and AT commands can control the GNSS function.

  • Page 52: Wwan_Led

    LTE-A Module Series EM121R-GL Hardware Design 4.5.3. WWAN_LED# The WWAN_LED# signal is used to indicate RF status of the module, and its sink current is up to 10 mA. To reduce current consumption of the LED, a current-limited resistor must be placed in series with the LED, as illustrated in the figure below.

  • Page 53: Dpr

    LTE-A Module Series EM121R-GL Hardware Design Table 25: State of the WAKE_ON_WAN# WAKE_ON_WAN# State Module Operation Status Output a 1 s low level pulse signal Call/SMS/Data is incoming (to wake up the host) Always at high level Idle/Sleep Host Module VCC_IO_HOST WAKE_ON_WAN# GPIO...

  • Page 54: Cellular/Wlan Coex Interface

    LTE-A Module Series EM121R-GL Hardware Design Table 27: Pin definition of WLAN_PA_EN for EM121R-GL Pin No. Pin Name Description Comment Self-protection of QLN4650 WLAN_PA_EN DI, PD 1.8 V control 4.6. Cellular/WLAN COEX Interface* The module provides the cellular/WLAN COEX interface, the following table shows the pin definition of this interface.

  • Page 55: Antenna Tuner Control Interface Through Rffe

    LTE-A Module Series EM121R-GL Hardware Design 4.7.2. Antenna Tuner Control Interface through RFFE Table 30: Pin Definition of Antenna Tuner Control Interface through RFFE Pin No. Pin Name Description DC Characteristics RFFE_CLK DO, PD Used for external MIPI IC control 1.8 V RFFE_DATA DIO, PD...
  • Page 56 LTE-A Module Series EM121R-GL Hardware Design Host Module VCC_IO_HOST 100K 100K 100K 100K 0 Ω CONFIG_0 GPIO 0 Ω CONFIG_1 GPIO NM-0 Ω CONFIG_2 GPIO NM-0 Ω CONFIG_3 GPIO Note: The voltage level VCC_IO_HOST depends on the host side, and could be a 1.8 V or 3.3 V voltage level.

  • Page 57: Rf Characteristics

    LTE-A Module Series EM121R-GL Hardware Design RF Characteristics 5.1. Cellular Antenna Interfaces EM121R-GL provides Main, Rx-diversity and GNSS antenna connectors which are used to resist the fall of signals caused by high-speed movement and multipath effect. The impedance of antenna ports is 50 Ω.
  • Page 58 LTE-A Module Series EM121R-GL Hardware Design WCDMA B6 830–840 875–885 WCDMA B8 880–915 925–960 WCDAM B19 830–845 875–890 LTE-FDD B1 1920–1980 2110–2170 – – LTE-FDD B2 1850 1910 1930 1990 LTE-FDD B3 1710–1785 1805–1880 – – LTE-FDD B4 1710 1755 2110 2155 LTE-FDD B5...

  • Page 59: Receiving Sensitivity

    LTE-A Module Series EM121R-GL Hardware Design LTE-TDD B41 2496–2690 2496–2690 – LTE-TDD B46 5150 5925 – – LTE-TDD B48 3550 3700 3550 3700 – – LTE-FDD B66 1710 1780 2110 2200 NOTE LTE-FDD B29/32 and LTE-TDD B46 support Rx only and are only for secondary component carrier. 5.1.3.

  • Page 60: Output Power

    LTE-A Module Series EM121R-GL Hardware Design LTE-FDD B8 -101 -93.3 10 MHz LTE-FDD B12 -102 -93.3 10 MHz LTE-FDD B13 -102 -93.3 10 MHz LTE-FDD B14 -101.5 -93.3 10 MHz LTE-FDD B18 -102 -96.3 10 MHz LTE-FDD B19 -102 -96.3 10 MHz LTE-FDD B20 -102...
  • Page 61 LTE-A Module Series EM121R-GL Hardware Design WCDMA B1 BPSK 24 dBm +1/-3 dB < -50 dBm WCDMA B2 BPSK 24 dBm +1/-3 dB < -50 dBm WCDMA B3 BPSK 24 dBm +1/-3 dB < -50 dBm WCDMA B4 BPSK 24 dBm +1/-3 dB <...
  • Page 62 LTE-A Module Series EM121R-GL Hardware Design 23 dBm ±2 dB LTE-TDD B38 QPSK < -40 dBm 10 MHz, 1RB 23 dBm ±2 dB LTE-TDD B39 QPSK < -40 dBm 10 MHz, 1RB 23 dBm ±2 dB LTE-TDD B40 QPSK < -40 dBm 10 MHz, 1RB 23 dBm ±2 dB LTE-TDD B41...

  • Page 63: Gnss Antenna Interface

    LTE-A Module Series EM121R-GL Hardware Design LTE-FDD B13 QPSK 23 dBm ± 2 dB < -40 dBm 10 MHz, 1RB LTE-FDD B14 QPSK 23 dBm ± 2 dB < -40 dBm 10 MHz, 1RB LTE-FDD B18 QPSK 23 dBm ± 2 dB <...

  • Page 64: Connector Definition

    LTE-A Module Series EM121R-GL Hardware Design 5.2.2. Connector Definition Table 38: EM121R-GL Connector Definition of Antenna Interfaces Connector Name Description Comment GNSS Antenna connector: 50 Ω impedance GNSS Antenna ⚫ GNSS: L1, L5 5.2.3. GNSS Frequency Table 39: GNSS Frequency Type Frequency Unit...

  • Page 65: Gnss Performance

    LTE-A Module Series EM121R-GL Hardware Design 5.2.4. GNSS Performance Table 40: EM121R-GL GNSS Performance Parameter Description Conditions Typ. Unit Cold start Autonomous -148 Sensitivity Reacquisition Autonomous -160 (GNSS) Tracking Autonomous -159 Autonomous 27.46 Cold start @ open sky XTRA enabled 17.07 Autonomous 26.45...

  • Page 66: Antenna Connector Size

    LTE-A Module Series EM121R-GL Hardware Design Figure 33: Antenna Connectors on the EM121R-GL Module 5.3.2. Antenna Connector Size Standard 2 mm × 2 mm receptacle antenna connectors are mounted for convenient antenna connection. The antenna connector’s PN is IPEX 20449-001E, and the connector dimensions are illustrated as below: EM121R-GL Hardware Design 65 / 80...

  • Page 67: Antenna Connector Installation

    LTE-A Module Series EM121R-GL Hardware Design Figure 34: EM121R-GL RF Connector Dimensions (Unit: mm) Table 41: Major Specifications of the RF Connector Item Specification Nominal Frequency Range DC to 6 GHz 50 Ω Nominal Impedance Temperature Rating -40 to +85 ° C Meet the requirements of: Voltage Standing Wave Ratio (VSWR) Max.
  • Page 68 LTE-A Module Series EM121R-GL Hardware Design Figure 36: Specifications of Mating Plugs Using Ø 0.81 mm Coaxial Cables The following figure illustrates the connection between the receptacle RF connector on the module and the mating plug using a Ø 0.81 mm coaxial cable. Figure 37: Connection between RF Connector and Mating Plug Using Ø...

  • Page 69: Antenna Requirements

    LTE-A Module Series EM121R-GL Hardware Design Figure 38: Connection between RF Connector and Mating Plug Using Ø 1.13 mm Coaxial Cable 5.4. Antenna Requirements Table 42: Antenna Requirements of EM121R-GL Type Requirements Supported Bands VSWR: ≤ 2 Efficiency: > 30 % LTE: Max Input Power: 50 W B1/B2/B3/B4/B5/B7/B8/B12/B13/...
  • Page 70 LTE-A Module Series EM121R-GL Hardware Design LNA Noise Figure: < 1.5 dB BeiDou/COMPASS; LNA Gain: 14.5 ± 5 dB Galileo Input Impedance: 50 Ω NOTE VDD voltage is 1.8 V. EM121R-GL Hardware Design 69 / 80...

  • Page 71: Electrical Characteristics And Reliability

    LTE-A Module Series EM121R-GL Hardware Design Electrical Characteristics and Reliability 6.1. Power Supply Requirements The typical input voltage of the module is 3.7 V. The following table shows the power supply requirements of the module. Table 43: Power Supply Requirements Parameter Description Min.

  • Page 72: Usb Version

    LTE-A Module Series EM121R-GL Hardware Design 6.2.2. USB Version Table 45: EM121R-GL Current Consumption (USB Only Version, 3.7 V Power Supply) Description Conditions Typ. Unit μA OFF state Power down 6.3. Digital I/O Characteristic Table 46: Logic Levels of Digital I/O (1.8 V) Parameter Description Min.

  • Page 73: Electrostatic Discharge

    LTE-A Module Series EM121R-GL Hardware Design Input high voltage 0.7 × USIM_VDD USIM_VDD + 0.3 Input low voltage -0.3 0.2 × USIM_VDD Output high voltage 0.8 × USIM_VDD USIM_VDD Output low voltage 6.4. Electrostatic Discharge The module is not protected against electrostatic discharge (ESD) in general. Consequently, it is subject to ESD handling precautions that typically apply to ESD sensitive components.
  • Page 74 LTE-A Module Series EM121R-GL Hardware Design Figure 39: Thermal Dissipation Area on Bottom Side of Module There are other measures to enhance the heat dissipation performance: ⚫ Add as many ground vias as possible on PCB. ⚫ Maximize the airflow over/around the module. ⚫...

  • Page 75: Absolute Maximum Ratings

    LTE-A Module Series EM121R-GL Hardware Design 6.6. Absolute Maximum Ratings Absolute maximum ratings for power supply and voltage on digital and analog pins of the module are listed in the following table. Table 50: Absolute Maximum Ratings Parameter Min. Max. Unit -0.3 6.7.

  • Page 76: Mechanical Dimensions And Packaging

    LTE-A Module Series EM121R-GL Hardware Design Mechanical Dimensions and Packaging This chapter mainly describes mechanical dimensions and packaging specifications of EM121R-GL. All dimensions are measured in mm, and the tolerances are ± 0.2 mm unless otherwise specified. 7.1. Mechanical Dimensions of the Module Figure 40: Mechanical Dimensions of the Module (Unit: mm) EM121R-GL Hardware Design 75 / 80...

  • Page 77: Top And Bottom Views Of The Module

    NOTE Images above are for illustration purpose only and may differ from the actual module. For authentic appearance and label, please refer to the module received from Quectel. 7.3. M.2 Connector EM121R-GL adopts a standard PCI Express M.2 connector which compiles with the directives and standards listed in PCI Express M.2 Specification.
  • Page 78 LTE-A Module Series EM121R-GL Hardware Design Figure 42: Tray Size (Unit: mm) Each tray contains 10 modules. The smallest package contains 100 modules. Tray packaging procedures are as below. 1. Use 10 trays to package 100 modules at a time (tray size: 247 mm × 172 mm). 2.

  • Page 79: Appendix References

    LTE-A Module Series EM121R-GL Hardware Design Appendix References Table 52: Related Documents Document Name Description Quectel_EM121R-GL_CA_Feature EM121R-GL CA Feature Quectel_PCIe_Card_EVB_User_Guide PCIE card EVB user guide AT commands manual for EG512R Quectel_EG512R&EM1x0R_Series_AT_Commands_ and EM1x0R-GL series and Manual EM121R-GL. The GNSS application note for Quectel_EM1x0R-GL&EG512R_Series_GNSS_ EM1x0R-GL &...
  • Page 80 LTE-A Module Series EM121R-GL Hardware Design EIRP Equivalent Isotropically Radiated Power Electrostatic Discharge Frequency Division Duplexing GLONASS Global Navigation Satellite System (Russia) GNSS Global Navigation Satellite System Global Positioning System Global System for Mobile Communications HSPA High Speed Packet Access HSUPA High Speed Uplink Packet Access kbps...
  • Page 81 LTE-A Module Series EM121R-GL Hardware Design Power Management Event Point-to-Point Protocol QPSK Quadrature Phase Shift Keying Resource Block Radio Frequency RFFE RF Front-End Relative humility Receive Specific Absorption Rate Short Message Service Transmission Control Protocol Transmit & Receive Transmit UART Universal Asynchronous Receiver &...
  • Page 82 Quectel that they wish to change the antenna trace design. In this case, a Class II permissive change application is required to be filed by...
  • Page 83 Antenna (1) The antenna must be installed such that 20 cm is maintained between the antenna and users, (2) The transmitter module may not be co-located with any other transmitter or antenna. In the event that these conditions cannot be met (for example certain laptop configurations or co-location with another transmitter), then the FCC/IC authorization is no longer considered valid and the FCC ID/IC ID cannot be used on the final product.
  • Page 84 Federal Communication Commission Interference Statement This device complies with Part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) This device may not cause harmful interference, and (2) this device must accept any interference received, including interference that may cause undesired operation. This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to Part 15 of the FCC Rules.
  • Page 85 This device is intended only for OEM integrators under the following conditions: (For module device use) 1) The antenna must be installed such that 20 cm is maintained between the antenna and users, and 2) The transmitter module may not be co-located with any other transmitter or antenna. As long as 2 conditions above are met, further transmitter test will not be required.
  • Page 86 Industry Canada Statement This device complies with Industry Canada’s licence-exempt RSSs. Operation is subject to the following two conditions: (1) This device may not cause interference; and (2) This device must accept any interference, including interference that may cause undesired operation of the device.
  • Page 87 Cet appareil est conçu uniquement pour les intégrateurs OEM dans les conditions suivantes: (Pour utilisation de dispositif module) 1) L'antenne doit être installée de telle sorte qu'une distance de 20 cm est respectée entre l'antenne et les utilisateurs, et 2) Le module émetteur peut ne pas être coïmplanté avec un autre émetteur ou antenne. Tant que les 2 conditions ci-dessus sont remplies, des essais supplémentaires sur l'émetteur ne seront pas nécessaires.
  • Page 88 Manual Information to the End User The OEM integrator has to be aware not to provide information to the end user regarding how to install or remove this RF module in the user’s manual of the end product which integrates this module. The end user manual shall include all required regulatory information/warning as show in this manual.

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