Jtag On Module Connector; External Connectivity; Emmc Boot Mode; Qspi Boot Mode - Enclustra Mars XU3 User Manual

Soc module
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Details on JTAG and on system test and debug are available in the Zynq UltraScale+ MPSoC Technical Ref-
erence Manual [19].
Certain Xilinx tool versions support QSPI flash programming via JTAG only when JTAG boot mode is used
(unavailable on the Mars XU3 SoC module). Alternatively, the QSPI flash can be programmed in u-boot or
Linux by the SPI controller in the PS or from an SPI external master.
3.5.1

JTAG on Module Connector

The PL and the PS JTAG interfaces are connected into one single chain available on the module connector.
The PS_JTAG pins are used by the Zynq Ultrascale+ TAP controller - the controller has full functionality only
after the PS boot is complete. In order to enable the ARM DAP controller, special commands must be sent
to the Zynq Ultrascale+ TAP.
The MPSoC device and the flash devices can be configured via JTAG from Xilinx SDK or Xilinx Vivado Hard-
ware Manager - for this operation, the ARM DAP must be enabled.
Signal Name
Module Connector Pin
JTAG_TCK
158
JTAG_TMS
162
JTAG_TDI
160
JTAG_TDO
164
Table 31: JTAG Interface
3.5.2

External Connectivity

JTAG signals can be connected directly on the base board to a JTAG connector. No pull-up/pull-down re-
sistors are necessary. The VREF pin of the programmer must be connected to VCC_CFG_MIO.
It is recommended to add 22
to the source. Please refer to the Enclustra Module Pin Connection Guidelines for details on JTAG interface.
3.6

eMMC Boot Mode

In the eMMC boot mode, the PS boots from the eMMC flash located on the module. The flash device is
connected to the PS MIO pins 13-22 for 8-bit data transfer mode.
3.7

QSPI Boot Mode

In the QSPI boot mode, the PS boots from the QSPI flash located on the module. The flash device is
connected to the PS MIO pins 0-5.
3.8

SD Card Boot Mode

In the SD card boot mode the PS boots from the SD card located on the base board. There are two SD card
boot modes available on the Mars XU3 SoC module. Please note that the SD boot mode with level shifter
is currently not supported.
The SD boot mode with level shifter is used with Ultra High Speed (UHS) SD cards. The controller will start
the communication at 3.3 V and afterwards it will command the card to drop from 3.3 V operation to 1.8
D-0000-432-001
Resistor
10 k pull-up to VCC_CFG_MIO
10 k pull-up to VCC_CFG_MIO
10 k pull-up to VCC_CFG_MIO
10 k pull-up to VCC_CFG_MIO
series termination resistors between the module and the JTAG header, close
40 / 52
Version 04, 25.07.2019

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