Pin #
J2[1]
GND
J2[2]
VREG_L5_1P8
J2[3]
VREG_L10_3P0
J2[4]
V_LCD_BACKLIGHT_CONN
J2[5]
V_LCD_BACKLIGHT_CONN
J2[6]
PM_MPP_4_WLED_PWM_CTR
L
J2[7]
NC
J2[8]
BLSPy_1_TS_I2C_SDA
J2[9]
NC
J2[10]
BLSPy_2_UART_RX
J2[11]
BLSPy_0_TS_I2C_SCL
J2[12]
VREG_L6_1P8
J2[13]
BLSPy_3_UART_TX
J2[14]
TS_INT_N
J2[15]
BACKLIGHT_EN_CONN
J2[16]
DISP_MDP_VSYNC_P
J2[17]
NC
J2[18]
NC
J2[19]
DISP_MDP_VSYNC_S
J2[20]
NC
J2[21]
NC
J2[22]
TS0_RESET_N
J2[23]
NC
J2[24]
WLED_CABC_DISP
J2[25]
GND
Open-Q™ 624A Development Kit User Kit
Signal
GND
Power output. Connected to PM8953 VREG_L5 regulator. Default is
+1.8V. Maximum current 600mA (shared with other platform circuitry)
Power output. Connected to PM8953 VREG_L5 regulator. Default is
+3.0V. Maximum current 150mA
+12V DC Power Output
PWM output dimming control on external backlight driver (PM8953
MPP 4)
No Connection
BLSP3 Bit 1 - SPI3_CS / I2C3_SDA (APQ_GPIO_10)
No Connection
BLSP3 Bit 2 - SPI3_MISO (APQ_GPIO_9)
BLSP3 Bit 0 - SPI3_CLK / I2C3_SCL (APQ_GPIO_11)
Power output. Connected to PM8953 VREG_L6 regulator. Default is
+1.8V. Maximum current 300mA (shared with other platform circuitry)
BLSP3 Bit 3 - SPI3_MOSI (APQ_GPIO_8)
Input, Touchscreen Interrupt (APQ_GPIO_65)
Output, Backlight Enable (APQ_GPIO_100)
Output, SDE vertical sync – primary (APQ_GPIO_24)
No Connection
No Connection
Output, SDE vertical sync – secondary (APQ_GPIO_25)
No Connection
No Connection
Output, Touchscreen Reset (APQ_GPIO_64)
No Connection
PWM input for dynamic dimming (Content Adaptive Backlight Control)
GND
Open-Q™ 624A Development Kit
Description
43
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