Microchip Technology Power Debugger Manual page 63

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Power Debugger AVR PORT Pins
Pin 6 (nSRST)
Pin 7 (Not connected)
Pin 8 (nTRST)
Pin 9 (TDI)
Pin 10 (GND)
4.3.6 Special Considerations
JTAG interface
On some Microchip AVR UC3 devices the JTAG port is not enabled by default. When using these devices it is
essential to connect the RESET line so that the Power Debugger can enable the JTAG interface.
aWire interface
The baud rate of aWire communications depends upon the frequency of the system clock, since data must be
synchronized between these two domains. The Power Debugger will automatically detect that the system clock has
been lowered, and re-calibrate its baud rate accordingly. The automatic calibration only works down to a system clock
frequency of 8 kHz. Switching to a lower system clock during a debug session may cause contact with the target to
be lost.
If required, the aWire baud rate can be restricted by setting the aWire clock parameter. Automatic detection will still
work, but a ceiling value will be imposed on the results.
Any stabilizing capacitor connected to the RESET pin must be disconnected when using aWire since it will interfere
with correct operation of the interface. A weak external pull-up (10 kΩ or higher) on this line is recommended.
Shutdown sleep mode
Some AVR UC3 devices have an internal regulator that can be used in 3.3V supply mode with 1.8V regulated I/O
lines. This means that the internal regulator powers both the core and most of the I/O. Only Microchip AVR ONE!
debugger supports debugging while using sleep modes where this regulator is shut off.
4.3.7 EVTI / EVTO Usage
The EVTI and EVTO pins are not accessible on the Power Debugger. However, they can still be used in conjunction
with other external equipment.
EVTI can be used for the following purposes:
• The target can be forced to stop execution in response to an external event. If the Event In Control (EIC) bits in
the DC register are written to 0b01, high-to-low transition on the EVTI pin will generate a breakpoint condition.
EVTI must remain low for one CPU clock cycle to guarantee that a breakpoint is triggered. The External
Breakpoint bit (EXB) in DS is set when this occurs.
• Generating trace synchronization messages. Not used by the Power Debugger.
EVTO can be used for the following purposes:
• Indicating that the CPU has entered Debug mode. Setting the EOS bits in DC to 0b01 causes the EVTO pin to
be pulled low for one CPU clock cycle when the target device enters Debug mode. This signal can be used as a
trigger source for an external oscilloscope.
• Indicating that the CPU has reached a breakpoint or watchpoint. By setting the EOC bit in a corresponding
Breakpoint/Watchpoint Control Register, the breakpoint or watchpoint status is indicated on the EVTO pin. The
EOS bits in DC must be set to 0xb10 to enable this feature. The EVTO pin can then be connected to an external
oscilloscope in order to examine watchpoint timing.
• Generating trace timing signals. Not used by the Power Debugger.
©
2020 Microchip Technology Inc.
Target Pins Mini-Squid Pin
6
7
8
9
0
User Guide
Power Debugger
On-chip Debugging
aWire Pinout
DS40002201A-page 63