Avr Uc3 Devices With Jtag/Awire - Microchip Technology Power Debugger Manual

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Name AVR
PORT
Pin
nSRST 6
VTG 4
GND 2, 10
4.2.6 Special Considerations
ERASE Pin
Some SAM devices include an ERASE pin which is asserted to perform a complete chip erase and unlock devices on
which the security bit is set. This feature is coupled to the device itself as well as the Flash controller and is not part
of the ARM core.
The ERASE pin is NOT part of any debug header, and the Power Debugger is thus unable to assert this signal to
unlock a device. In such cases the user should perform the erase manually before starting a debug session.
Physical Interfaces
JTAG Interface
The RESET line should always be connected so that the Power Debugger can enable the JTAG interface.
SWD Interface
The RESET line should always be connected so that the Power Debugger can enable the SWD interface.
4.3

AVR UC3 Devices with JTAG/aWire

All Microchip AVR UC3 devices feature the JTAG interface for programming and debugging. In addition, some AVR
UC3 devices feature the aWire interface with identical functionality using a single wire. Check the device data sheet
for supported interfaces of that device.
4.3.1 AVR UC3 On-Chip Debug System
The Microchip AVR UC3 OCD system is designed in accordance with the Nexus 2.0 standard (IEEE-ISTO
™
5001 -2003), which is a highly flexible and powerful open on-chip debug standard for 32-bit microcontrollers. It
supports the following features:
• Nexus compliant debug solution
• OCD supports any CPU speed
• Six Program Counter hardware breakpoints
• Two data breakpoints
• Breakpoints can be configured as watchpoints
• Hardware breakpoints can be combined to give break on ranges
• Unlimited number of user program breakpoints (using BREAK)
• Real-time Program Counter branch tracing, data trace, process trace (supported only by debuggers with parallel
trace capture port)
For more information regarding the AVR UC3 OCD system, consult the
4.3.2 JTAG Physical Interface
The JTAG interface consists of a 4-wire Test Access Port (TAP) controller that is compliant with the IEEE
standard. The IEEE standard was developed to provide an industry-standard way to efficiently test circuit board
connectivity (Boundary Scan). Microchip AVR and SAM devices have extended this functionality to include full
Programming and On-chip Debugging support.
©
2020 Microchip Technology Inc.
SAM
PORT
Pin
10 Reset.
1 Target voltage reference.
3, 5, 9 Ground.
Description
AVR32UC Technical Reference
User Guide
Power Debugger
On-chip Debugging
Manual.
®
1149.1
DS40002201A-page 58