Microchip Technology Power Debugger Manual page 59

Figure 4-5. JTAG Interface Basics
4.3.2.1 AVR JTAG Pinout
When designing an application PCB, which includes a Microchip AVR MCU with the JTAG interface, it is
recommended to use the pinout as shown in the figure below. Both 100-mil and 50-mil variants of this pinout are
supported, depending on the cabling and adapters included with the particular kit.
Figure 4-6. AVR JTAG Header Pinout
Table 4-5. AVR JTAG Pin Description
Name Pin
TCK
TMS
TDI
TDO
nTRST
nSRST
VTG
GND 2, 10
Tip: Remember to include a decoupling capacitor between pin 4 and GND.
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2020 Microchip Technology Inc.
programmer /
debugger
1 Test Clock (clock signal from the Power Debugger into the target device).
5 Test Mode Select (control signal from the Power Debugger into the target device).
9 Test Data In (data transmitted from the Power Debugger into the target device).
3 Test Data Out (data transmitted from the target device into the Power Debugger).
8 Test Reset (optional, only on some AVR devices). Used to reset the JTAG TAP controller.
6 Reset (optional). Used to reset the target device. Connecting this pin is recommended since
it allows the Power Debugger to hold the target device in a Reset state, which can be
essential to debugging in certain scenarios.
4 Target voltage reference. The Power Debugger samples the target voltage on this pin in
order to power the level converters correctly. The Power Debugger draws less than 3 mA
from this pin in debugWIRE mode and less than 1 mA in other modes.
Ground. Both must be connected to ensure that the Power Debugger and the target device
share the same ground reference.
TCK
TMS
TDI
TDO
1 2
TCK GND
TDO VCC
TMS /RESET
(TRST)
(NC)
TDI GND
AVR JTAG
Description
User Guide
Power Debugger
On-chip Debugging
Vcc
target
device
DS40002201A-page 59