Equinox Systems ISPnano I Series User Manual page 97

Distributor of Equinox Technologies: Excellent Integrated System Limited
Datasheet of ISPNANO S3 KIT - ISP PORTABLE PROGRAMMER
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10 Programmer I/O5
11 Programmer I/O4
12 Programmer I/O3
13 Programmer I/O2
14 Programmer I/O1
15 PROG_VPP
16 PROG_RESET
O - Output from programmer to Target Device
I - Input to programmer from Target Device
P - Passive e.g. GROUND and power rails
N/C - Not connected
Please note:
Signal GROUND (0V)
The 'Signal GROUND (0V)' connection is the 0V to which the programming lines (JTAG, SPI, I2C,
UART) are referenced to. This 0V line should be connected directly to the Target System (UUT) 0V
connection via the shortest possible wire link.
Target Vcc
The 'Target Vcc' is the output of the 'Controlled Power Supply' from the programmer. The power
supply has a range of 1.8 to 5.0V and can be switched ON / OFF to the Target System under
programmer control.
80
I/O Spare I/O
I/O JTAG – TMS This pin is used for JTAG Target
•
I/O JTAG – TCK
•
SPI - SCK
•
I/O JTAG – TDO
•
SPI – MISO
•
UART - RXD
•
I/O JTAG – TDI
•
SPI – MOSI
•
UART - TXD
•
P See note
O RESET
ISPnano Series Programmer - User Manual – V1.11 – 12
Systems only.
This pin can be used for JTAG or
SPI Target Systems.
This pin can be used for JTAG, SPI
or UART Target Systems.
This pin can be used for JTAG, SPI
or UART Target Systems.
Vpp Voltage
The programmer can output a "Vpp"
voltage on this pin between 6.5V
and 13.8V. This pin should not be
connected unless a Vpp voltage is
required by the Target IC.
Target RESET control pin
This pin controls the Target Device
RESET pin. It will driven
HIGH/LOW according to the device
type and settings in the <Pre-
program State Machine> tab in the
EQtools project.
th
May 2011