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Distributor of Equinox Technologies: Excellent Integrated System Limited
Datasheet of ISPNANO S3 KIT - ISP PORTABLE PROGRAMMER
Contact us: sales@integrated-circuit.com Website: www.integrated-circuit.com
5
Programmer I/O5
6
OP6
7a
I2C_SDA
7b
XMEGA_PDI_DATA
7c
ATTINY_TPI_DATA
8a
I2C_SCL
8b
XMEGA_PDI_CLK
8c
ATTINY_TPI_CLK
9
PROG_RESET
10
PROG_VPP
11 +
PROG_GND
12
13 +
TARGET_VCC
14
O - Output from programmer to Target Device
I - Input to programmer from Target Device
P - Passive e.g. GROUND and power rails
N/C - Not connected
I/O
Spare I/O
•
O
Algorithm specific
PDI_BREAK
•
I/O
I2C SDA
•
I/O
TEST (PDI_DATA)
•
I/O
TPI_DATA
•
I/O
I2C SCL
•
O
RESET
•
O
TPI_CLK
•
O
RESET
P
See note
P
Signal GROUND (0V)
P
TARGET_VCC
DO NOT USE
I2C SDA data signal
•
XMEGA DATA Signal
•
ATtiny DATA Signal
•
I2C SCL clock signal
•
XMEGA CLOCK Signal
•
ATtiny CLOCK Signal
•
Target RESET control pin
This pin controls the Target Device
RESET pin. It will be driven HIGH /
LOW according to the device type
and settings in the <Pre-program
State Machine> tab in the EQtools
project.
Vpp Voltage
The programmer can output a "Vpp"
voltage on this pin between 6.5V
and 13.8V. This pin should not be
connected unless a Vpp voltage is
required by the Target IC.
Signal Ground Connection (1)
0V to which the programmer JTAG,
SPI, I2C, PDI and TPI signal lines
are referenced to.
Target VCC
This pin should be connected to the
Target System Vcc.
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