Target Isp Port - Connector Pin-Out - Equinox Systems ISPnano I Series User Manual

Distributor of Equinox Technologies: Excellent Integrated System Limited
Datasheet of ISPNANO S3 KIT - ISP PORTABLE PROGRAMMER
Contact us: sales@integrated-circuit.com Website: www.integrated-circuit.com
1.2 Target ISP Port – connector pin-out
The 'Target ISP Connector' port features all the signals required to implement In-System
Programming (ISP) of a Target IC using the SPI, JTAG, I2C, XMEGA PDI, ATtiny TPI or UART
interface. This connector also features the programmable "Target Vcc" and "Target Vpp" voltages
plus a switched "EXTERNAL Vcc" supply.
The illustration below shows the location of the 'Target ISP Connector' port on the rear panel of the
programmer.
The pin-out of this connector is detailed in the table below.
Pin Programmer
No Pin name
1 + 2 TARGET_VCC
3 + 4 TARGET_EXT_VCC P
5 + 6 PROG_GND
7a I2C_SCL
7b XMEGA_PDI_CLK
7c ATTINY_TPI_CLK
8a I2C_SDA
8b XMEGA_PDI_DATA
8c ATTINY_TPI_DATA
84
'Target ISP Connector' port
The connector is a 16-pin bump-polarised IDC
connector with 0.1" pin spacing.
Pin 1 is the top right pin as shown in the diagram
opposite.
I/O Connect to
pin on
Target System
P TARGET_VCC
See notes.
P Signal GROUND (0V)
I/O I2C SCL
•
O RESET
•
O TPI_CLK
•
I/O I2C SDA
•
I/O TEST (PDI_DATA)
•
I/O TPI_DATA
•
ISPnano Series Programmer - User Manual – V1.11 – 12
Notes
Target VCC
This pin should be connected to the
Target System Vcc.
Target External VCC
This pin should be connected to the
Target System Vcc.
Only use this pin if the "External
Target Vcc" is to be switched to
the "Target Vcc"
Signal Ground Connection (1)
0V to which the programmer JTAG,
SPI, I2C signal lines are referenced
to.
I2C SCL clock signal
•
XMEGA CLOCK Signal
•
ATtiny CLOCK Signal
•
I2C SDA data signal
•
XMEGA DATA Signal
•
ATtiny DATA Signal
•
th
May 2011