Table Of Contents - Texas Instruments TMS320C6747 DSP User Manual

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Preface
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1 Introduction
1.1 Purpose of the Peripheral
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2 Architecture
2.1 Clock and Reset
2.2 Open Host Controller Interface Functionality
2.3 Differences From OHCI Specification for USB
2.4 Implementation of OHCI Specification for USB1.1
2.5 OHCI Interrupts
2.6 USB1.1 Host Controller Access to System Memory
2.7 Physical Addressing
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3 Registers
3.1 OHCI Revision Number Register (HCREVISION)
3.2 HC Operating Mode Register (HCCONTROL)
3.3 HC Command and Status Register (HCCOMMANDSTATUS)
3.4 HC Interrupt and Status Register (HCINTERRUPTSTATUS)
3.5 HC Interrupt Enable Register (HCINTERRUPTENABLE)
3.6 HC Interrupt Disable Register (HCINTERRUPTDISABLE)
3.7 HC HCAA Address Register (HCHCCA)
3.8 HC Current Periodic Register (HCPERIODCURRENTED)
3.9 HC Head Control Register (HCCONTROLHEADED)
3.10 HC Current Control Register (HCCONTROLCURRENTED)
3.11 HC Head Bulk Register (HCBULKHEADED)
3.12 HC Current Bulk Register (HCBULKCURRENTED)
3.13 HC Head Done Register (HCDONEHEAD)
3.14 HC Frame Interval Register (HCFMINTERVAL)
3.15 HC Frame Remaining Register (HCFMREMAINING)
3.16 HC Frame Number Register (HCFMNUMBER)
3.17 HC Periodic Start Register (HCPERIODICSTART)
3.18 HC Low-Speed Threshold Register (HCLSTHRESHOLD)
3.19 HC Root Hub A Register (HCRHDESCRIPTORA)
3.20 HC Root Hub B Register (HCRHDESCRIPTORB)
3.21 HC Root Hub Status Register (HCRHSTATUS)
3.22 HC Port 1 Status and Control Register (HCRHPORTSTATUS1)
3.23 HC Port 2 Status and Control Register (HCRHPORTSTATUS2)
SPRUFM8 - June 2009
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Contents
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