Registers
3.7
HC HCAA Address Register (HCHCCA)
The HC HCAA address register (HCHCCA) defines the physical address of the beginning of the HCCA.
HCHCCA is shown in
31
15
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 8. HC HCAA Address Register (HCHCCA) Field Descriptions
Bit
Field
Value
31-8
HCCA
0-FF FFFFh
7-0
Reserved
3.8
HC Current Periodic Register (HCPERIODCURRENTED)
The HC current periodic register (HCPERIODCURRENTED) defines the physical address of the next
endpoint descriptor (ED) on the periodic ED list. HCPERIODCURRENTED is shown in
described in
Table
31
15
LEGEND: R = Read only; -n = value after reset
Table 9. HC Current Periodic Register (HCPERIODCURRENTED) Field Descriptions
Bit
Field
Value
31-4
PCED
0-FFF FFFFh Physical address of the current ED on the periodic ED list. This field represents bits 31-4 of the
3-0
Reserved
20
Universal Serial Bus OHCI Host Controller
Figure 8
and described in
Figure 8. HC HCAA Address Register (HCHCCA)
HCCA
R/W-0
Description
Physical address of the beginning of the HCCA.
0
Reserved
9.
Figure 9. HC Current Periodic Register (HCPERIODCURRENTED)
PCED
R-0
Description
physical address of the next ED on the periodic ED list. EDs are assumed to begin on a 16-byte
aligned address, so bits 3-0 of this pointer are assumed to be 0. For the restrictions on physical
addresses, see
Section
0
Reserved
Table
8.
HCCA
R/W-0
8
7
PCED
R-0
2.7.
www.ti.com
Reserved
R-0
Figure 9
and
4
3
Reserved
R-0
SPRUFM8 – June 2009
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16
0
16
0