Introduction; Purpose Of The Peripheral - Texas Instruments TMS320C6747 DSP User Manual

1

Introduction

This document describes the universal serial bus OHCI host controller.
1.1

Purpose of the Peripheral

The USB1.1 OHCI host controller (HC) is a single port controller that communicates with USB devices at
the USB low-speed (1.5M bit-per-second maximum) and full-speed (12M bit-per-second maximum) data
rates. It is compatible with the Universal Serial Bus Specification Revision 2.0 and the Open HCI—Open
Host Controller Interface Specification for USB, Release 1.0a, available through the Compaq Computer
Corporation web site, and hereafter called the OHCI Specification for USB. It is assumed that users of the
USB1.1 host controller are already familiar with the USB Specification and OHCI Specification for USB.
The USB1.1 host controller implements the register set and makes use of the memory data structures
defined in the OHCI Specification for USB. These registers and data structures are the mechanisms by
which a USB host controller driver software package can control the USB1.1 host controller. The OHCI
Specification for USB also defines how the USB host controller implementation must interact with those
registers and data structures in system memory.
To reduce processor software and interrupt overhead, the USB1.1 host controller generates USB traffic
based on data structures and data buffers stored in system memory. The USB1.1 host controller accesses
these data structures without direct intervention by the processor using its bus master port. These data
structures and data buffers can be located in internal or external system RAM.
The USB1.1 host controller provides an interrupt to both the ARM and DSP.
8 Universal Serial Bus OHCI Host Controller
Universal Serial Bus OHCI Host Controller
User's Guide
SPRUFM8 – June 2009
SPRUFM8 – June 2009
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