Ohci Interrupts; Usb1.1 Host Controller Access To System Memory; Physical Addressing; Relationships Between Virtual Address Physical Address - Texas Instruments TMS320C6747 DSP User Manual

Architecture
2.5

OHCI Interrupts

The USB1.1 host controller is controlled by either the ARM or the DSP. It has the ability to interrupt either
processor.
2.6

USB1.1 Host Controller Access to System Memory

The USB1.1 module needs to access system memory to read and write the OHCI data structures and
data buffers associated with USB traffic. The switch fabric allows the USB1.1 host controller to access
system memory.
2.7

Physical Addressing

Transactions on the internal bus use physical addresses, so all system memory accesses initiated by the
USB1.1 host controller must use physical addresses. The ARM CPU can be configured to use virtual
addressing. In this case, ARM side software manipulates virtual addresses that may or may not be
identical to physical addresses. When virtual addressing is used, system software must perform the
appropriate virtual address to physical address and physical address to virtual address conversions when
manipulating the USB1.1 host controllers data structures and pointers to those data structures.
Figure 1 shows the ARM virtual address to physical address conversion.
Figure 1. Relationships Between Virtual Address Physical Address
12 Universal Serial Bus OHCI Host Controller
Processor
MMU
Processor
physical
address
00000000h
FFFFFFFFh
Processor
virtual
address
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SPRUFM8 – June 2009
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