Texas Instruments TMS320C6457 User Manual
Texas Instruments TMS320C6457 User Manual

Texas Instruments TMS320C6457 User Manual

Dsp power/sleep controller (psc)
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TMS320C6457 DSP
Power/Sleep Controller (PSC)
User's Guide
Literature Number: SPRUGL4
March 2009

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Summary of Contents for Texas Instruments TMS320C6457

  • Page 1 TMS320C6457 DSP Power/Sleep Controller (PSC) User's Guide Literature Number: SPRUGL4 March 2009...
  • Page 2 SPRUGL4 – March 2009 Submit Documentation Feedback...
  • Page 3: Table Of Contents

    Contents ............................Preface ....................Introduction/Feature Overview ....................Purpose of the Peripheral ........................Features ....................Terms and Abbreviations ......................Power/Sleep Controller ....................Power and Reset Domains ................Power Domain and Module States Defined ..................2.2.1 Power Domain States ....................2.2.2 Module States ....................
  • Page 4 www.ti.com List of Figures ....................Power and Clock Domains .................. Peripheral Identification Register (PID) ............. Power Domain Transition Command Register (PTCMD) ..............Power Domain Transition Status Register (PTSTAT) ............... Power Domain Status Register 0-4 (PDSTATx) ................ Power Domain Control Register 0-4 (PDCTLx) ................
  • Page 5: Preface

    – Reserved bits in a register figure designate a bit that is used for future device expansion. Related Documentation From Texas Instruments The following documents describe the TMS320C6457 DSP. Copies of these documents are available on the Internet at www.ti.com. Tip: Enter the literature number in the search box provided at www.ti.com.
  • Page 6: Introduction/Feature Overview

    This document covers the usage of the Power/Sleep Controller (PSC) in the TMS320C6457 device. The intent is not to keep this document as a user's guide, but to actually add this to the TMS320C6457 data manual, once it is available.
  • Page 7: Power/Sleep Controller

    Clock Domain 8 LPSC9 TCP2_0 LPSC10 DDR.PLLC Clock Domain 9 sysclk1_po sysclk2_po TCP2_1 sysclk3_po bpsysclk_po Clock Domain 10 VCP2 Clock Domain 6 (Never Gated) AlwaysOn Power Domain 0 SPRUGL4 – March 2009 TMS320C6457 DSP Power/Sleep Controller (PSC) Submit Documentation Feedback...
  • Page 8: Power Domain And Module States Defined

    The other power domains, however, can be in either the ON or OFF state; i.e., the memory for a specific module can remain powered down if it is not used. TMS320C6457 DSP Power/Sleep Controller (PSC) SPRUGL4 – March 2009 Submit Documentation Feedback...
  • Page 9: Module States

    The procedure for power domain state transitions follows (X denotes the power domain number, Y denotes the module domain number): • Wait for PTSTAT.GOSTAT[X] to clear to 0x0. Wait for any previously initiated transitions to finish before initiating a new transition. SPRUGL4 – March 2009 TMS320C6457 DSP Power/Sleep Controller (PSC) Submit Documentation Feedback...
  • Page 10: Module State Transitions

    • Wait for PTSTAT.GOSTAT[X] to clear to 0x0. The domain is safely in the new state only after PTSTAT.GOSTAT[X] is cleared to 0x0. TMS320C6457 DSP Power/Sleep Controller (PSC) SPRUGL4 – March 2009 Submit Documentation Feedback...
  • Page 11: Recommendations For Power Domain/Module Sequencing

    – Block Reset: Allows emulation to block software initiated local and module resets. Local reset applies only to the C64x+ core domains; module reset applies to all other domains. SPRUGL4 – March 2009 TMS320C6457 DSP Power/Sleep Controller (PSC) Submit Documentation Feedback...
  • Page 12: Psc Registers

    Section 3.2.7 0xA20 MDCTL8 Module Control Register 8 (TCP2_0) Section 3.2.7 0xA24 MDCTL9 Module Control Register 9 (TCP2_1) Section 3.2.7 0xA28 MDCTL10 Module Control Register 10 (VCP2) Section 3.2.7 TMS320C6457 DSP Power/Sleep Controller (PSC) SPRUGL4 – March 2009 Submit Documentation Feedback...
  • Page 13: Register Descriptions

    LEGEND:R = Read only; -n = value after reset Table 5. Peripheral Identification Register (PID) Field Descriptions Field Value Description 31-0 Peripheral ID used to differentiate different modules in the system SPRUGL4 – March 2009 TMS320C6457 DSP Power/Sleep Controller (PSC) Submit Documentation Feedback...
  • Page 14: Power Domain Transition Command Register (Ptcmd)

    Power domain GO transition command (X denotes power domain number). Write 1 to cause the state transition interrupt generation block to evaluate the new PTNEXT and MDCTL.NEXT states as the application desired states. TMS320C6457 DSP Power/Sleep Controller (PSC) SPRUGL4 – March 2009 Submit Documentation Feedback...
  • Page 15: Power Domain Transition Status Register (Ptstat)

    Table 8. Power Domain Status Register 0-4 (PDSTATx) Field Descriptions Field Value Description 31-2 Reserved Reserved STATE Power domain status Power Domain is in the OFF state. ower Domain is in the ON state. SPRUGL4 – March 2009 TMS320C6457 DSP Power/Sleep Controller (PSC) Submit Documentation Feedback...
  • Page 16: Power Domain Control Register 0-4 (Pdctlx)

    Table 9. Power Domain Control Register 0-4 (PDCTLx) Field Descriptions Field Value Description 31-1 Reserved Reserved NEXT Power domain next state Power domain off. Power domain on. Others Indicates transition. TMS320C6457 DSP Power/Sleep Controller (PSC) SPRUGL4 – March 2009 Submit Documentation Feedback...
  • Page 17: Module Status Register 0-10 (Mdstaty)

    Module local reset status. (This bit applies to C64x+ domains only.) Local reset is asserted. Local reset is de-asserted. Reserved Reserved STATE Module state status. Indicates current module status. SwRstDisable state. Enable state. Others Reserved. SPRUGL4 – March 2009 TMS320C6457 DSP Power/Sleep Controller (PSC) Submit Documentation Feedback...
  • Page 18: Module Control Register 0-10 (Mdctly)

    Module local reset control. (This bit applies to C64x+ modules only.) Assert local reset. De-assert local reset. Reserved Reserved NEXT Module next state. SwRstDisable state. Enable state. Others Reserved. TMS320C6457 DSP Power/Sleep Controller (PSC) SPRUGL4 – March 2009 Submit Documentation Feedback...
  • Page 19 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.

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