Registers; Usb1.1 Host Controller Registers - Texas Instruments TMS320C6747 DSP User Manual

www.ti.com
3

Registers

Most of the host controller (HC) registers are OHCI operational registers, defined by the OHCI
Specification for USB. Four additional registers not specified by the OHCI Specification for USB provide
additional information about the USB1.1 host controller state. The USB1.1 host controller registers can be
accessed in user and supervisor modes.
To enhance code reusability with possible future versions of the USB1.1 host controller, reads and writes
to reserved USB1.1 host controller register addresses are to be avoided. Unless otherwise specified,
when writing registers that have reserved bits, read-modify-write operations must be used so that the
reserved bits are written with their previous values.
The USB1.1 host controller registers are listed in
Address Acronym
01E2 5000h HCREVISION
01E2 5004h HCCONTROL
01E2 5008h HCCOMMANDSTATUS
01E2 500Ch HCINTERRUPTSTATUS
01E2 5010h HCINTERRUPTENABLE
01E2 5014h HCINTERRUPTDISABLE
01E2 5018h HCHCCA
01E2 501Ch HCPERIODCURRENTED
01E2 5020h HCCONTROLHEADED
01E2 5024h HCCONTROLCURRENTED
01E2 5028h HCBULKHEADED
01E2 502Ch HCBULKCURRENTED
01E2 5030h HCDONEHEAD
01E2 5034h HCFMINTERVAL
01E2 5038h HCFMREMAINING
01E2 503Ch HCFMNUMBER
01E2 5040h HCPERIODICSTART
01E2 5044h HCLSTHRESHOLD
01E2 5048h HCRHDESCRIPTORA
01E2 504Ch HCRHDESCRIPTORB
01E2 5050h HCRHSTATUS
01E2 5054h HCRHPORTSTATUS1
01E2 5058h HCRHPORTSTATUS2
(1)
Restrictions apply to the physical addresses used in these registers (see
(2)
Connected to the integrated USB1.1 phy pins (DM, DP).
(3)
Although the controller implements two ports, the second port cannot be used.
SPRUFM8 – June 2009
Submit Documentation Feedback
Table 1.
Table 1. USB1.1 Host Controller Registers
Register Description
OHCI Revision Number Register
HC Operating Mode Register
HC Command and Status Register
HC Interrupt and Status Register
HC Interrupt Enable Register
HC Interrupt Disable Register
HC HCAA Address Register
HC Current Periodic Register
HC Head Control Register
HC Current Control Register
HC Head Bulk Register
HC Current Bulk Register
HC Head Done Register
HC Frame Interval Register
HC Frame Remaining Register
HC Frame Number Register
HC Periodic Start Register
HC Low-Speed Threshold Register
HC Root Hub A Register
HC Root Hub B Register
HC Root Hub Status Register
HC Port 1 Status and Control Register
HC Port 2 Status and Control Register
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(2)
(3)
Section 2.7).
Universal Serial Bus OHCI Host Controller
Registers
Section
Section 3.1
Section 3.2
Section 3.3
Section 3.4
Section 3.5
Section 3.6
Section 3.7
Section 3.8
Section 3.9
Section 3.10
Section 3.11
Section 3.12
Section 3.13
Section 3.14
Section 3.15
Section 3.16
Section 3.17
Section 3.18
Section 3.19
Section 3.20
Section 3.21
Section 3.22
Section 3.23
13