Flash Memory; Nvram; Quad Uart (Quart) - SMART Embedded Computing MVME7100ET Installation And Use Manual

A hardware flash bank write protect switch is provided on the MVME7100ET to enable write
protection of the NOR Flash. Regardless of the state of the software flash write protect bit
in the NOR Flash Control/Status register, write protection is enabled when this switch is
ON. When this switch is OFF, write protection is controlled by the state of the software flash
write protect bits and can only be disabled by clearing this bit in the NOR Flash
Control/Status register. Note that the F_WE_HW bit reflects the state of the switch and is
only software readable whereas the F_WP_SW bit supports both read and write
operations.
The MVME7100ET provides a dual boot option for booting from one of two separate boot
images in the boot flash bank which are referred to as boot block A and boot block B. Boot
blocks A and B are each 1 MB in size and are located at the top (highest address) 2 MB of
the boot flash memory space. Block A is located at the highest 1 MB block and block B is
the next highest 1 MB block. A flash boot block switch is used to select between boot block
A and boot block B. When the switch is OFF, the flash memory map is normal and block A
is selected as shown in Figure 3. When the switch is ON, block B is mapped to the highest
address as shown in Figure 4. The MAP_SELECT bit in the flash Control/Status register
can disable the jumper and restore the memory map to the normal configuration with block
A selected.
4.8.1

Flash Memory

The MVME7100ET is designed to provide 128 MB of soldered-on NOR flash memory. Two
AMD +3.3 V devices are configured to operate in 16-bit mode to form a 32-bit flash bank.
This flash bank is also the boot bank and is connected to LBC Chip Select 0 and 1.
Also included is a second bank of NAND flash, up to 8 GB, connected to LBC Chip Select
2. The VPD flash packet(s) will determine which devices are populated and the size of the
devices. Programming details can be found in the MVME7100ET Single Board Computer
Programmer's Reference manual.
4.8.2

NVRAM

The MVME7100ET includes one NXP 512MB MRAM device connected to the MC864xD
device control bus to provide a non-volatile memory that has unlimited writes, fast access
and long term data retention without power. The MRAM is organized as 256K by 16. Refer
to the data sheet for additional information
4.8.3

Quad UART (QUART)

The MVME7100ET contains one Quad UART device connected to the MC864xD device
control bus to provide additional asynchronous serial ports. The Quad UART provides four
asynchronous serial ports which are routed to the P2 connector. The TTL-level signals of
RX, TX, CTS, and RTS from each port are routed through on-board RS-232 drivers and
MVME7100ET Single Board Computer Installation and Use (6806800K87G)
Functional Description
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