Furuno FAR-2107 Series Service Manual page 391

- Input-1
Shows EAV outputs when the strongest signals are inputted in a row.
- Input-2
Shows EAV outputs when signals of the medium level are inputted in a row.
The EAV outputs become increasingly larger than inputted signals and finally
reach the highest level.
- Input-3
Shows EAV outputs when no signal is inputted in a row. EAV outputs serve to
maintain the input level and outputs are gradually reduced as signals become
less.
4-4 Noise rejection (NOISE REJ)
When white noises appear all over the radar screen, set ON in "4:NOISE REJ" of the
[PICTURE] box menu. The processing of noise rejection is based on a concept that
receiving signals are inputted into the delay circuit and outputted by averaging the
outputs of the delay terminal on the circuit. By averaging process, strong signals
become weaker and weaker signals like noises reduced their levels.
Input Signal
CLK
1 2 3 4 5
Clock
Short/Middle Pulse: 80MHz
Long Pulse: 40MHz
Fig. 7.3 16 Schematic diagram of noise rejection processing
In long pulses, for instance, it is possible to receive echoes close to the pulse-length at
1.2 µ sec pulse. The shift lock frequency of the delay circuit is 40 MHz/25 nsec. Since
the delay circuit is comprised of 16 stages, the delay time is 16 x 25 nsec = 0.4 µ sec.
Consequently, there is a delay of 1.2 µ sec pulse + 0.4 µ sec since an echo of 1.2
µ sec pulse length is inputted into the delay circuit until the echo is completely
outputted, to make the echo a little extended. In the short and middle pulses, shift lock
frequency is set at 80 MHz since the pulse length is smaller. The pulse length in S1, for
instance, is 0.07 µ sec.
6 7 8 9 10 11 12 13 14 15 16
+
Output Signal
Average
7-47
Input Signal
Output Signal
Noise Rej. OFF
7.3 Processor Unit: RPU-013
Noise Rej. ON