Nintendo GAME BOY Programming Manual page 27

The 5 types of interrupts are as follows:
Cause of Interrupt
Vertical blanking
LCDC status interrupt
Timer overflow
Serial transfer completion
P10-P13 input signal goes low
When multiple interrupts occur simultaneously, the IE flag of each is set, but only that with the
highest priority is started. Those with lower priorities are suspended.
When using an interrupt, set the IF register to 0 before setting the IE register.
The interrupt process is as follows:
1
When an interrupt is processed, the corresponding IF flag is set.
2
Interrupt enabled.
If the IME flag (Interrupt Master Enable) and the corresponding IE flag are set, the
interrupt is performed by the following steps.
3
The IME flag is reset, and all interrupts are prohibited.
4
The contents of the PC (program counter) are pushed onto the stack RAM.
5
Control jumps to the interrupt starting address of the interrupt.
The resetting of the IF register that initiates the interrupt is a hardware reset.
The interrupt processing routine should push the registers during interrupt processing.
When an interrupt begins, all other interrupts are prohibited, but processing of the highest level
interrupt is enabled by controlling the IME and IE flags with instructions.
Return from the interrupt routine is performed by the RET1 and RET instructions.
If the RETI instruction is used for the return, the IME flag is automatically set even if a DI
instruction is executed in the interrupt processing routine.
IF the RET instruction is used for the return, the IME flag remains reset unless an EI instruction is
executed in the interrupt routine.
Each interrupt request flag of the IF register can be individually tested using instructions.
Interrupts are accepted during the op code fetch cycle of each instruction.
Interrupt starting
Priority
address
1 0040h
2 0048h
3 0050h
4 0058h
5 0060h
27
Chapter 1: System
The LCDC interrupt
mode can be selected
(see STAT register).
Mode 00
Mode 01
Mode 10
LYC=LY
consist