Game Boy Programming Manual
2.3 Description of CPU Functions
Interrupts
There are five types of interrupts available, including 4 types of maskable internal interrupts
and 1 type of maskable external interrupt. The IE flag is used to control interrupts. The IF
flag indicates which type of interrupt is set.
! LCD Display Vertical Blanking
! Status Interrupts from LCDC (4 modes)
! Timer Overflow Interrupt
! Serial Transfer Completion Interrupt
! End of Input Signal for ports P10-P13
DMA Transfers
DMA transfers are controlled by the DMA registers.
<DMG>
DMG allows 40 x 32-bit DMA transfers from 8000h-DFFFh to OAM (FE00h-FE9Fh).
The transfer start address can be specified in increments of 100h for 8000h-DFFFh.
<CGB>
In addition to the DMA transfers method for DMG (from 0000h-DFFFh in CGB), CGB
enables two new types of DMA transfer — horizontal blanking and general-purpose DMA
transfers.
Note, however, that when performing a DMG-type DMA transfer on CGB, some
consideration must be given to specifying the destination RAM area.
For more information, see the DMA Functions section in Chapter 2.
1 Horizontal Blanking DMA Transfer
Sixteen bytes of data are automatically transferred for each horizontal blanking period
during a DMA transfer from the user program area (0000h-7FFFh) or external and
hardware working RAM area (A000h-DFFFh) to the LCD display RAM area
(8000h-9FFFh).
2 General-Purpose DMA Transfer
Between 16 and 2048 bytes of data (specified in 16-byte increments) are transferred
from the user program area (0000h-7FFFh) or external and hardware working RAM
area (A000h-DFFFh) to the LCD display RAM area (8000h-9FFFh), during the
Vertical Blanking Period.
Timer
The timer is composed of the following:
! TIMA (timer counter)
! TMA (timer modulo register)
! TAC (timer control register)
Controller Connections
! P10-P13: Input ports
! P14-P15: The key matrix structure is composed of the output ports.
At user program startup, the status of the CPU port registers and mode registers are as
follows.
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