Nintendo GAME BOY Programming Manual page 124

Game Boy Programming Manual
HALT
After a HALT instruction is executed, the system clock is stopped and HALT mode is entered. Although
the system clock is stopped in this status, the oscillator circuit and LCD controller continue to operate.
In addition, the status of the internal RAM register ports remains unchanged.
HALT mode is canceled by an interrupt or reset signal.
The program counter is halted at the step after the HALT instruction. If both the interrupt request flag and
the corresponding interrupt enable flag are set, HALT mode is exited, even if the interrupt master enable
flag is not set.
Once HALT mode is canceled, the program starts from the address indicated by the program counter.
If the master enable flag is set, the contents of the program counter are pushed to the stack and control
jumps to the starting address of the interrupt.
If the RESET terminal goes LOW in HALT mode, the mode becomes that of a normal reset.
STOP
Execution of a STOP instruction stops both the system clock and oscillator circuit. STOP mode is
entered, and the LCD controller also stops.
However, the status of the internal RAM registers ports remains unchanged.
STOP mode can be canceled by a reset signal.
If the RESET terminal goes LOW in STOP mode, it becomes that of a normal reset status.
The following conditions should be met before a STOP instruction is executed and STOP mode is
entered.
•
All interrupt-enable (IE) flags are reset.
•
Input to P10 — P13 is LOW for all.
Halt
Stop
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