Nintendo GAME BOY Programming Manual page 26

Game Boy Programming Manual
The timer consists of TIMA, TMA, and TAC.
The timer input clock is selected by TAC.
TIMA is the timer itself and operates using the clock selected by TAC.
TMA is the modulo register of TIMA. When TIMA overflows, the TMA data is loaded into TIMA.
nd
Writing 1 to the 2
The timer should be started (the TAC start flag set) after the count up pulse is selected. Starting
the timer before or at the same time as the count up pulse is selected may result in excessive
count up operation.
Example:
L D
L D
L D
L D
If a TMA write is executed with the same timing as that with which the contents of the modulo
register TMA are transferred to TIMA as the result of a timer overflow, the same data is transferred
to TIMA.
2.4.4 Interrupt Flags
Name Address
IF FF0F
Bit reset enabled
Name Address
IE FFFF
Name
Interrupt Master Enable
IME
0: Reset by DI instruction, prohibits all interrupts
1: Set by EI instruction, the interrupts set by the IE registers are enabled
Bit reset enabled
Interrupts are controlled by the IE (interrupt enable) flag.
The IF (interrupt request) flag can be used to determine which interrupt was requested.
bit of TAC starts the timer.
A, 3 ;Select a count pulse of f/2
(07), A ;TAC ← 3 set
A, 7 ;Start timer
(07), A ;
Bit 7 6 5 4 3
0: Disabled
1: Enabled
Bit 7 6 5 4
0: Disabled
1: Enabled
8
2 1 0
R/W Interrupt Request
Vertical Blanking
LCDC (STAT Referenced)
Timer Overflow
Serial I/O Transfer Completion
P10-P13 Terminal Negative Edge
3 2 1 0
R/W Interrupt Enable
Vertical Blanking
LCDC (STAT Referenced)
Timer Overflow
Serial I/O Transfer Completion
P10-P13 Terminal Negative Edge
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