Mbc2; Overview; Description Of Registers; Memory Map - Nintendo GAME BOY Programming Manual

2. MBC2

2.1 Overview

Controller for up to 2 Mbits (256 Kbytes) of ROM with built-in backup RAM (512 x 4 bits).

2.2 Description of Registers

! Register 0:
! Register 1:

2.3 Memory Map

(512x4Bit)

Backup RAM

2.4 Backup RAM
Allocated to the D0-D3 areas of CPU addresses A000h-A1FFh
Backup RAM is write-protected by a power-on reset.
To protect backup data, avoid removing write protection unless necessary.
RAMCS gate data (serves as write-protection for RAM)
Write addresses: 000h-0FFFh Write data: 0Ah
Writing 0Ah to 000-0FFFh causes the CS to be output, allowing access to RAM.
ROM bank code
Write addresses: 2100h-21FFh Write data: 01h-0Fh
The ROM bank can be selected.
CPU Address
DFFFh
Internal
Working
RAM
C000h
External
A1FFh
Expansion
RAM
A000h
Display
8000h
Program
Switching
Area
4000h
Program
Residence
Area
0000
Chapter 8: Game Boy Memory Controllers (MBC)
Bank 0F
Bank 0E
Bank 6
Bank 5
Bank 4
Bank 3
Bank 2
Bank 1
Bank 0
219
ROM Address
3FFFFh
: :
: :
18000h
14000h
10000h
0C000h
08000h
04000h
00000