Appendix 2 Register And Instruction Set Summaries - Nintendo GAME BOY Programming Manual

Game Boy Programming Manual
APPENDIX 2: REGISTER AND INSTRUCTION SET SUMMARIES
1. CONTROL REGISTER SUMMARY
Register Address
P1 FF00
Port P15-
P10
SB FF01
Serial
transfer
register
SC FF02
Serial
control
DIV FF04
Divider
TIMA FF05
Timer
TMA FF06
Timer
modulo
TAC FF07
Timer
control
IF FF0F
Interrupt
request flag
IE FFFF
Interrupt
enable flag
D7 D6 D5
P15
Transfer
start
0: No
start
1: Start
16 15 14
f/2 f/2 f/2
64Hz 128Hz 256Hz
D4 D3 D2
P14 P13 P12
13 12
f/2 f/2 f/2
512Hz 1024Hz 2048Hz
Timer stop
0: Stop
1: Operate
Terminals End of serial Timer
P10-P13 transfer overflow
HIGH
Terminals End of Timer
P10-P13 serial overflow
LOW transfer
268
D1 D0
P11 P10
Clock Shift
speed clock
0:
0: 8 KHz
External
1: 256
1:
KHz
Internal
11 10 9
f/2 f/2
4096Hz 8192Hz
Frequency
selection bit
10 6
00: f/2 10: f/2
4 8
01: f/2 11: f/2
LCDC V-blank
Controller
STAT
LCDC V-blank
Controller
STAT
Comment
R/W
Control of
transfer
data by P14,
P15
R/W
Transfer data
R/W
In double-
speed mode
clock speed
also doubled
R/W
With clear
normal by LD
instruction:
f=4194304
Double speed:
f=8388608
R/W
Timer unit.
Operates at
double-speed
in double-
speed mode
R/W
Preset register
for timer
R/W
Normal-speed:
f=4194304
Double-speed:
f=8388608
R/W
Bit reset valid
R/W
0: Disabled
1: Enabled