Accessing The Clock Counters; Memory Map - Nintendo GAME BOY Programming Manual

Write addresses: 6000h-7FFFh Write Data: 0 → 1
Writing 0 → 1 causes all counter data to be latched. The latched contents are
retained until 0 → 1 is written again.

3.3 Accessing the Clock Counters

The clock counter registers are assigned to the external expansion RAM area of the CPU address
space. To access the clock counters, RAM bank switching must first be performed.
External expansion RAM Area (A000h-BFFFh) Bank Map
The following are examples of accessing the clock counters.
3.3.1 Reading
The clock counters are accessed by first writing 0x0A to register 0. This opens the gate used to
access the counters. To read clock counter values, write 1 to register 3 to latch the values of all
the registers. If the value of register 3 is already 1, first set it to 0 and then to 1. While this register
is set to 1, the clock counters will operate but the latched values of all of the clock counters will not
change. This allows the clock counters to be read.
For example, the seconds counter register can be accessed and read by first setting the RAM
bank to 8, then reading from any CPU address between A000h and BFFFh.
3.3.2 Writing
Writing 0Ah to register 0 opens the access gate, allowing each clock counter register to be written
to.

3.4 Memory Map

! ROM bank 0 is assigned to the program residence area (0000h-3FFFh) of the CPU memory
space (unchangeable).
! One bank from among ROM banks 01h-7Fh can be assigned to the program switching area
(4000h-7FFFh) of the CPU memory space.
Bank Device
00h RAM BANK 0
01h RAM BANK 1
02h RAM BANK 2
03h RAM BANK 3
08h Seconds counter
09h Minutes counter
0Ah Hours counter
0Bh Days counter (L)
0Ch Days counter (H)
: : : :
Chapter 8: Game Boy Memory Controllers (MBC)
Notes
Not used
Not used
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