Ep0 Fifo Remain Counter(Ep0Fiforemain) R; Ep0 Fifo For Cpu(Ep0Fifoforcpu) R/W - Epson S1R72105 Technical Manual

Scsi interface controller
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7.5.2.5 EP0 FIFO remain Counter (EP0FIFOremain) R
Shows the number of bytes of remaining data in FIFO of Endpoint 0.
USBIndex : 00h
Address
Register Name
1Dh
EP0FIFOremain
7.5.2.6 EP0 FIFO for CPU (EP0FIFOforCPU) R/W
This register allows access to FIFO of Endpoint 0 from the CPU.
When the EnFiFOwr bit of the EP0FIFOCtrl register is set, writing is enabled, when the EnFIFOrd bit is set,
reading is enabled.
It should be noted that reading or writing decreases the number of data in FIFO.
USBIndex : 00h
Address
Register Name
1Eh
EP0FIFOforCPU
Rev.1.0
Bit Symbol
7: EP0FIFOremainCount[7]
6: EP0FIFOremainCount[6]
5: EP0FIFOremainCount[5]
4: EP0FIFOremainCount[4]
3: EP0FIFOremainCount[3]
2: EP0FIFOremainCount[2]
1: EP0FIFOremainCount[1]
0: EP0FIFOremainCount[0]
Bit Symbol
7: EP0FIFOdata[7]
6: EP0FIFOdata[6]
5: EP0FIFOdata[5]
4: EP0FIFOdata[4]
3: EP0FIFOdata[3]
2: EP0FIFOdata[2]
1: EP0FIFOdata[1]
0: EP0FIFOdata[0]
EPSON
S1R72105 Technical Manual
Description
EP0 FIFO remain Counter
Description
EP0 FIFO for CPU
45

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